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2021-10-07T07:20:02Z

Pierre:

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2021-10-07T07:16:45Z

Pierre:

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2021-10-07T07:09:55Z

Pierre:

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2021-10-07T07:09:10Z

Pierre:

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2021-10-07T06:59:11Z

Pierre:

Detector Overview

2019-07-24T20:49:38Z

Pierre: /* Notes of December 2016 */

Back to [[Main Page]]

= Table of Figures =

[[#_Toc480655698|Figure 1 - Silicon Strip Detectors configuration 7]]

[[#_Toc480655699|Figure 2 - GEMs or Micro-Megas tracking configuration 7]]

[[#_Toc480655700|Figure 3 - Standard TPC configuration 8]]

[[#_Toc480655701|Figure 4 - Proposed Radial TPC configuration 8]]

[[#_Toc480655702|Figure 5 - General ALPHA-g experimental setup 9]]

[[#_Toc480655703|Figure 6 - ALPHA-g rTPC and Barrel Scintillator, sketch side and top view 10]]

[[#_Toc480655704|Figure 7 - Detector concept for the ALPHA-g experiment Bottom shows the ALPHA-g antihydrogen trap within the cryostat. Surrounding the cryostat the rTPC with its electronics components for track recording. At the top the Barrel Scintillator with associated analog electronics. 11]]

[[#_Toc480655705|Figure 8 - Prototype setup. Initial implementation of the Data path is shown. This setup is to remain active for further DAQ and data quality tests. 12]]

[[#_Toc480655706|Figure 9 - Prototype stringing and inspection 15]]

[[#_Toc480655707|Figure 10 - Prototype assembled and under test 15]]

[[#_Toc480655708|Figure 11 - Cosmic pulse from 4 consecutive channels 15]]

[[#_Toc480655709|Figure 12 - High Voltage distribution card with Anode pre-amp 15]]

[[#_Toc480655710|Figure 13 - High Voltage distribution card placed on chamber 15]]

[[#_Toc480655711|Figure 14 - Cathode pads with pad connectors and FR4 ribs structure 15]]

[[#_Toc480655712|Figure 15 - Potting shell for the HV capacitors of the Anode Wire Card 15]]

[[#_Toc480655713|Figure 16 - Cathode pad adaptor card with pre-amp 16]]

[[#_Toc480655714|Figure 17 - HV supply, Network switch and VME crate with Grif-16 + Clock Dist. Module 16]]

[[#_Toc480655715|Figure 18 - Cathode pad readout board before assembly 16]]

[[#_Toc480655716|Figure 19 - Section of the chamber under test (external trigger from S1(top Scint.) .S2(bot Scint.) 16]]

[[#_Toc480655717|Figure 20 - Drift time distribution (maximum drift time 4us) 16]]

[[#_Toc480655718|Figure 21 - Track reconstruction (red line) based on drift time 17]]

[[#_Toc480655719|Figure 22 - Arrival time distribution and Garfield simulation (red line) 17]]

[[#_Toc480655720|Figure 23 - New design of the mounting of the sensor assembly at both end of the bar. 18]]

[[#_Toc480655721|Figure 24 - 3D-Model of the sensors. Visible the bar in pink, the SiPMs in grey and the signal connections in orange. 18]]

[[#_Toc480655722|Figure 25 - SiPM Gain versus Bias Voltage 19]]

[[#_Toc480655723|Figure 26 - Breakdown voltage variation across multiple SiPM units 19]]

[[#_Toc480655724|Figure 27 - Air gap versus optical compound puck 19]]

[[#_Toc480655725|Figure 28 - DN versus Temperature 20]]

[[#_Toc480655726|Figure 29 - Dark count rate versus Temperature 20]]

[[#_Toc480655727|Figure 30 - Time resolution setup. Test has been done on 3 SensL devices 21]]

[[#_Toc480655728|Figure 31 -Signal sample and CFD timing extraction 21]]

[[#_Toc480655729|Figure 32 - Initial time resolution without time versus charge correction. 21]]

= Introduction =

This document is to describe the radial TPC gas system for the ALPHA-g Experiment.

The original design of the rTPC has been gone through a major revision in 2014-2015. Optimization and further studies have been done to confirm the feasibility of the use of a radial TPC for the ALPHA-g experiment. The actual design of the radial TPC has been mainly focused during late 2015 with its final design in early 2016.

The rTPC detector itself, as well as its electronics and the data acquisition scheme, are entirely designed in-house by the different groups in the Science Technology Department - Detector group, Detector Electronics group, Electronics group, Data Acquisition group. External manufacturing help (Montreal, SFU, York) are already in place and successfully used.

= Purpose =

The ALPHA-g experimental goal is to make a first worldwide measurement of the gravity for the antihydrogen atom. This measurement is done in 2 phases

# Up / Down measurement, where the gravity is qualitatively tested and an initial result will demonstrate the sense of the gravity pull on the antihydrogen.
# A quantitative measurement of the gravity pulls with a 1% precision.

= Scope =

The scope of this project is to manufacture, assemble, test and deliver a detector assembly for the ALPHA-g experiment at CERN. This detector assembly is composed of 2 main parts
* The radial TPC and the Barrel Scintillator
* The Triumf responsibility will include the related firmware and software tools required for its operation and monitoring of the data collected by the detector.

Once the anti-hydrogen (anti-H) is created and maintained in a magnetic “bottle” – Trap –, the annihilation of the anti-H on the wall of the bottle is the sole method to confirm its past presence. The position of the annihilation is what needs to be recorded and the detector will measure the annihilation vertices by tracking the annihilation products (mostly pions) originating from the interaction of the anti-H with matter (trap walls). From the location of the annihilation on the trap wall, the data analysis with further external experimental information will generate the results for the experiment objective. The TPC is to provide the necessary information from all the by-products of the annihilation for track and vertex reconstruction.

= Definitions and Abbreviations =

General acronyms or terms used for the ALPHA-g experiment

{|
! rTPC
! Radial Time Projection Chamber
|-
| AD
| Antiproton Decelerator (CERN building where ALPHA-g is installed)
|-
| Triumf-ALPHA-g
| Refers to the Triumf staff team working on the rTPC detector
|-
| Trap
| Penning trap, magnetic environment preventing the charged particle to escape a defined volume.
|-
| SSD
| Silicon Strip Detector
|}

Table 1 – ALPHA-g Abbreviations

= Detector Concept =

The ALPHA and ALPHA-II experiments track the antihydrogen annihilation using Silicon Strip Detector (SSD). These devices are placed as close as possible to the trap in order to obtain the best position resolution for annihilation vertex measurements.

For the ALPHA-g, the trap is to be longer and make the use of the SSD too expensive.

Alternative solutions have been considered, such as:

<ul>
<li><blockquote>Cylindrical GEMs or Micromegas providing at least 3 intersection points (similar to the SSD configuration but on a larger scale Figure 1). The ASACUSA experiment uses a tracker based on 2 layers of double-sided Micromegas tracker. The detector is used for monitoring of antihydrogen production with high rates. No details have been published on this detector, but their design is based on a tracker for the CLA-12 experiment at J-Lab. This type of the detector will have a limited pattern recognition capability since the cells are connected in one direction on the front-side, and in the other direct in the backside. Also, this detector cannot be made very large without having significant dead region. Furthermore, covering a large area would be expensive (Figure 2).</blockquote></li>
<li><blockquote>Standard TPC concept is an attractive proposition as this type of detector is well known and Triumf has experience with such device. In this particular case, the geometry is odd as the drift distance is ~2 meter in a restrained space of 7cm. The main reasons for rejecting this option are: 1) we wish to retain the possibility of operating the TPC with low or no axial magnetic field, (2) the non-uniform fringe magnetic fields from the magnetic trap may disrupt the long axial drift of the electrons (by sending them to the walls). Furthermore electron drifting in this volume would be affected by, inhomogeneity of the field cage, large transversal and longitudinal diffusion for such a restricted signal collection region. The latter region is to provide signal gain and such a multiplication cannot be done without using GEMs or MicroMegas devices. Here again, the challenges are multiple in the drift region as well as in the gain region. Channel density is to be very high for proper track information recovery. Figure 3</blockquote></li>
<li><blockquote>Radial TPC is a compromise as the channel density is reduced by distributing the gain region over the cylinder surface of the detector. Electron multiplication is produced with standard wires stretched between the two ends of the cylinder. In this configuration, the magnetic field (vertical) is perpendicular to the electric field generating a Lorentz force on the traveling electron towards the anode. This results in a spread of charge over several wires from a single particle track crossing the drift volume. B-field homogeneity, E-field non-linearity are to be considered and a particular design note is filed. Figure 4 Figure 3</blockquote></li></ul>

[[File:image2.png|411x281px]]

Figure 1 - Silicon Strip Detectors configuration

[[File:image3.png|412x286px]]

Figure 2 - GEMs or Micro-Megas tracking configuration

[[File:image4.png|425x309px]]

Figure 3 - Standard TPC configuration

[[File:image5.png|424x300px]]

Figure 4 - Proposed Radial TPC configuration

Various simulations studies have been performed to develop and validate the detector concept. The simulation results are presented in the dedicated [[Detector Simulations]].

= ALPHA-g Detector Setup =

The ALPHA-g experiment setup is composed of

* Antiproton delivery beamline (pbar)
* Positron delivery beamline (e+)
* Cryostat containing the experiments traps
* Radial TPC surrounding the cryostat
* Barrel Scintillator surrounding the rTPC
* Solenoid magnet enclosing the overall detector

[[File:image6.png|456x358px]]

Figure 5 - General ALPHA-g experimental setup

The detector part of the experiment is then composed of multiple components from which this report talks only about a subset of them:

# The Radial TPC physical detector and its associated electronics.
# The Barrel Scintillator and its associated electronics.
# The software and acquisition system required for the operation and monitoring of the rTPC and the Barrel Scintillator
# External and Endcap Scintillators (not shown in Figure 5)

<blockquote>The other components – non-discussed in this document – are related to:
</blockquote>
* The experiment infrastructure as a whole
* The antiproton, and positron transport lines to the rTPC
* The cryostat and internal Penning traps for the creation of the antihydrogen atoms
* The Hardware and Software involved in the overall trap operations and monitoring

= Radial TPC =

<blockquote>The rTPC is a cylindrical detector composed of an inner cylinder with 2 endplates from where the field and anode wires are strung in between. Part of the electronics is placed on the outer surface of the rTPC and surrounded by the Barrel Scintillator.

[[File:image7.png|418x267px]]
</blockquote>
Figure 6 - ALPHA-g rTPC and Barrel Scintillator, sketch side and top view

The concept of the rTPC particle detection capabilities requires the registration of the drifted electrons generated by the particle crossing the drift volume. The initial electron is multiplied on the vicinity of the anode wire and an electrical signal is developed on the anode wire. A corresponding induced signal is also visible on the pads placed on the inner surface of the outer cylinder providing another position information (z).

The Detector Simulation Design Notes document is answering the physics operation of the radial TPC.

[[File:image8.png|389x291px]]

Figure 7 - Detector concept for the ALPHA-g experiment Bottom shows the ALPHA-g antihydrogen trap within the cryostat. Surrounding the cryostat the rTPC with its electronics components for track recording. At the top the Barrel Scintillator with associated analog electronics.

= Prototype Phase =

The prototype phase is to construct a section of the overall rTPC length (1/8) with the radial dimensions being not scaled down.

The purpose of this prototype is to confirm several points such as:

<ul>
<li>Mechanical design & assembly procedure</li>
<li>Gas volume sealing design</li>
<li>High Voltage operation and stability</li>
<li>Frontend electronics operation</li>
<li>The anode wire & pad signal quality</li>
<li>Overall power distribution</li>
<li>DAQ development.</li>
<li>Initial data set for:
<ul>
<li><blockquote>Signal comparison to Garfield simulation</blockquote></li>
<li><blockquote>Offline simulation data</blockquote></li>
<li><blockquote>Signal processing & track reconstruction</blockquote></li>
<li><blockquote>Studies of gas mixture</blockquote></li></ul>
</li></ul>

The rTPC prototype is partially equipped with anode wires and cathode pads electronics. Necessary external trigger is provided by (2 scintillator panels) S1.S2 NIM logic and fed to the 2 prototype digitizers boards (GRIF-16). Standard Midas DAQ system is to collect and store the cosmic data.

This prototype setup will remain available for further data acquisition for data analysis, track reconstruction, but also for upgrading the DAQ to its final configuration.

Fabrication and assembly of the final rTPC will be happening in parallel of the continuous prototype tests. We may perform a beam test at M11 to optimize the analysis routine and to best understand the prototype detector.

[[File:image9.png|576x429px]]

Figure 8 - Prototype setup. Initial implementation of the Data path is shown. This setup is to remain active for further DAQ and data quality tests.

== Notes of December 2016 ==

The fabrication and assembly of the prototype has been completed by mid-August. The associated electronics for anode wire is connected up to 8 100Msps digitizers. The data acquisition has been since then in operation. The cathode pad readout electronics is not yet available.

In summary, the different steps to reach this milestones were:

<ol style="list-style-type: lower-alpha;">
<li>Gluing of the radial and transversal G10 ribs to the 2 cathode half-cylinder.
<ol style="list-style-type: lower-alpha;">
<li>While this operation has been successful, the working time with the glue is too short to envisage the gluing of the full length rTPC. New glue candidate has been identified for that job.</li></ol>
</li>
<li>Placements and soldering of the cathode pads connectors on the 2 half-cylinder pad boards.
<ol style="list-style-type: lower-alpha;">
<li>While this operation is possible it is time consuming. New procedure for the soldering and modified jigs have made to simplify this operation.</li></ol>
</li>
<li>Field wires and Anode wires stringing. The procedure has worked well and we were able to string the whole chamber (512 wires total) in about 2 weeks.
<ol style="list-style-type: lower-alpha;">
<li>While single person shift was possible for stinging the prototype, we expect to have 2 persons per shift to complete the stringing of the full chamber in about the same amount of time.</li></ol>
</li>
<li>Closure of the chamber, HV and GND connections.
<ol style="list-style-type: lower-alpha;">
<li>No major issues have been identified, therefore the current design is sound.</li></ol>
</li>
<li>Gas leak test
<ol style="list-style-type: lower-alpha;">
<li>Once all the crimp pins were sealed and holes (mounting holes) blocked, the chamber has been put under gas (Ar/CO2 70/30) and a gas leak less than 5% has been measured.</li></ol>
</li>
<li>Installation of the High Voltage distribution cards (AWC) and initial high voltage test.
<ol style="list-style-type: lower-alpha;">
<li>The AWC provides the 3.2KV to the anode wires. While the HV capacitor were coated with a corona dope to prevent any high voltage breakdown, corona effects have been seen and heard coming from the surface of the HV capacitors. After several unsatisfactory improvements of the isolation of these capacitors, a new design of the card is in progress and full encapsulation of the capacitors in plastic is foreseen. This issue is not affecting the operation of the chamber at short and mid-terms, but need to be resolved for the final detector where humidity and operation condition are less controlled than in the lab.</li>
<li>A potting document has been written which describes the new procedure. It can be found in the Elog entry 217. (https://daq.triumf.ca/elog-alphag/alphag/217)</li></ol>
</li>
<li>After appropriate gas flushing, the nominal high voltage have been applied to the chamber while monitoring the individual current (Cathode -4KV, Field: -300V, Anode: +3.2KV). Using 55Fe and cosmic rays, initial evaluation of the anode wire signal have been made using the final anode pre-amp board (AWB).</li>
<li>Readout system acquiring the AWB signals up to 160 channels has been setup and are composed of:
<ol style="list-style-type: lower-alpha;">
<li>Low voltage distribution for the anode pre-amp boards using the foreseen power cable, but temporary power supplies.</li>
<li>Use of the foreseen signal cable (8m long) from the anode wire board to the WFD in the VME crate.</li></ol>
</li>
<li>Prototype DAQ system has been put in place and is composed of:
<ol style="list-style-type: lower-alpha;">
<li>Full VME crate hosting the available 10 Grif-16 and the Clock distribution module.</li>
<li>Use of the foreseen Griffin WFD board (Grif-16) but using the 100msps instead of the 62.5Msps for now, and the associated clock and trigger distribution modules.</li>
<li>Use of a dedicated network 10Gb switch for local data acquisition.</li>
<li>Grif-16 firmware for ALPHA-g with external trigger capability.</li>
<li>Midas DAQ software for network data acquisition from the 10 Grif-16 boards. Including dedicated UDP frontend and standard data logging.</li>
<li>Online analysis software for individual waveform display.</li>
<li>Offline analysis software for initial track reconstruction based on wire information.</li></ol>
</li>
<li>The cathode pad signal acquisition board is not yet available. But interface board to permit the signal evaluation using the anode wire pre-amp has been made. This allowed us to confirm the induced signal on the cathode pads to be about one tenth in amplitude of the anode wire.</li>
<li>Prototype tests
<ol style="list-style-type: lower-alpha;">
<li>Several High Voltage scans have been made to confirm the nominal voltage operation for the anode at 3.2KV, scan up to 3.6KV. (REF)</li>
<li>Several Gas mixture have been tested such as Ar/CO2: 90-10, 80-20, 70-30, and 60-40. The results confirm the change of the electron drift time as expected by the literature. (REF)</li></ol>
</li></ol>

The prototype fabrication highlighted some minor design problems that fortunately were correctable or will be corrected for the full detector. The operation stability of the chamber is acceptable as no HV breakdown have been notified through several weeks of continuous operation.

Presently every channel (anode wire) of the chamber is tested for signal quality. Two “hot wires” have been identified and one of them fixed by “revers-biasing” the chamber. The remaining hot-wire is still under investigation but will not stop the overall checkup procedure of the chamber.

The cathode pad readout board is the next element to be placed on the prototype and we expect to confirm its operation by the end of September. Delays for its realisation are due to the complexity of the PCB layout.

{|
!
[[File:image10.jpeg|250x188px]]

Figure 9 - Prototype stringing and inspection
!
[[File:image11.jpeg|251x188px]]

Figure 10 - Prototype assembled and under test
|-
|
[[File:image12.jpeg]]

Figure 11 - Cosmic pulse from 4 consecutive channels
|
[[File:image13.jpeg|233x174px|C:\Users\midas\AppData\Local\Microsoft\Windows\INetCache\Content.Word\20160804_121741.jpg]]

Figure 12 - High Voltage distribution card with Anode pre-amp
|-
|
[[File:image14.jpeg]]

Figure 13 - High Voltage distribution card placed on chamber
|
[[File:image15.jpeg|250x187px|C:\Users\midas\AppData\Local\Microsoft\Windows\INetCache\Content.Word\20160804_121915.jpg]]

Figure 14 - Cathode pads with pad connectors and FR4 ribs structure
|}

[[File:image16.jpeg|300x152px|IMG_20161207_103557]]

Figure 15 - Potting shell for the HV capacitors of the Anode Wire Card

{|
!
[[File:image17.png|335x200px]]

Figure 16 - Cathode pad adaptor card with pre-amp
|-
|
[[File:image18.jpeg]]

Figure 17 - HV supply, Network switch and VME crate with Grif-16 + Clock Dist. Module
|
[[File:image19.jpeg|285x214px|C:\Users\midas\AppData\Local\Microsoft\Windows\INetCache\Content.Word\20160902_162056.jpg]]

Figure 18 - Cathode pad readout board before assembly
|-
|
[[File:image20.png]]

Figure 19 - Section of the chamber under test (external trigger from S1(top Scint.) .S2(bot Scint.)
|
[[File:image21.png]]

Figure 20 - Drift time distribution (maximum drift time 4us)
|-
|
[[File:image22.png|196x190px|C:\Users\midas\AppData\Local\Microsoft\Windows\INetCache\Content.Word\canvas2D.png.png]]

Figure 21 - Track reconstruction (red line) based on drift time
|
[[File:image23.png|280x190px|C:\Users\midas\AppData\Local\Microsoft\Windows\INetCache\Content.Word\roft_run95.png.png]]

Figure 22 - Arrival time distribution and Garfield simulation (red line)
|}

= Data Acquisition =

An important fraction of the ALPHA-g project is dedicated to the electronics required for the readout and data collection of the detector. Fortunately, previous development by the “Electronics Development” group can be re-used or used as a starting point for further ALPHA-g requirements. The GRIFFIN data acquisition architecture has similar features that ALPHA-g. Electronics boards are already available and fit our needs. The effort is mostly in the firmware customization, which is largely common to GRIFFIN and ALPHA-g experiment.

One particular new electronics board is the “PadWings” board which handle 288 cathode pads of the rTPC and transmit its data through Gbit optical link. This board uses the ASIC AFTER SCA that we already have experience with for the T2K FGD where close to 300 chips are currently in operation at Tokai.

The overall data acquisition software is left to the Midas package. In particular with the T2K and DEAP and current ALPHA-II experiments, the Midas software has proven its flexibility and versatility. Software effort will be focused on the system integration with the CERN infrastructure in term of data configuration (database), data storage and analysis. Good understanding for this type of specific implementation and issues have already been dealt with for DEAP and ALPHA-II.

= Barrel Scintillator =

The barrel scintillators surround the rTPC over its full length. A primary purpose is to provide cosmic track detection/rejection via time of flight differences. Preliminary MC studies show that timing resolution of ~300ps will differentiate >90% of cosmic ray events.

The barrel is composed of 64 scintillating bars of trapezoidal shape with a length of 2.6m. Due to the solenoid magnetic field and the restricted space at both end of the detector, the readout is done by multiple SiPM per bar (6). The mechanical integration design and the electronics channel have already been defined. See Figure 26 and Figure 27.

[[File:image24.png|576x270px]]

Figure 23 - New design of the mounting of the sensor assembly at both end of the bar.

[[File:image25.png|301x175px]] [[File:image26.png|244x178px]]

Figure 24 - 3D-Model of the sensors. Visible the bar in pink, the SiPMs in grey and the signal connections in orange.

The ALPHA-g rTPC project doesn’t include the realization and fabrication of the barrel scintillator prior Q1’ 18. But single bar setup is already in place (DetFac) for signal/timing studies, and will be in use based on the resources availability throughout the year ’16 and ’17. While results from the 2 prototype bars are being collected and analysed, the mechanical design of the Barrel Scint. did restart in December 2016.

== SiPM for the Barrel Scintillator studies ==

=== Breakdown voltage ===

The SiPM devices from SensL have the advantage to have a very narrow variation of the breakdown voltage across units. When multiple sensors are needed (such as in our case where 6 will be looking at the same light source), the gain variation between units is negligible and permit to operate group of sensors under the same operating voltage.

Figure 23 shows the gain at different bias voltage for different light intensity. The crossing point at gain zero refers to the breakdown voltage. Repeating the test for each individual sensors (8) gives the overall breakdown voltage of 0.4V. The SensL datasheet indicates a variation of 0.5V.

[[File:image27.png|529x208px]]

Figure 25 - SiPM Gain versus Bias Voltage

[[File:image28.png|207x186px]]

Figure 26 - Breakdown voltage variation across multiple SiPM units

=== Sensor interface to the scintillating bar ===

Mechanically the assembly of the sensors and the barrel Scintillator is delicate as the 64 bars are supported by a support ring (Figure 25, Figure 26). The sensor contact to the bar is to be maintained and reproducible. This interface can be air or an optical compound (puck) see Figure 25. Results shows an increase of light collection over 40%. This puck will also provide a soft cushion which should help in the long term, mechanical issues.

[[File:image29.png|436x207px]]

Figure 27 - Air gap versus optical compound puck

=== Temperature effects ===

Temperature has a great impact on Silicon based devices. This is the case for the SensL sensor as well. The dark noise is strongly dependent on temperature and we foresee to cool the SiPMs in order to reduce this background noise. With a dedicated setup we recorded the dark noise rate based on temperature, Figure 28. The results in Figure 28 shows a reduction of 2 for 10 °C.

[[File:image30.png|576x158px]]

Figure 28 - DN versus Temperature

[[File:image31.png|404x288px]]

Figure 29 - Dark count rate versus Temperature

=== Time resolution ===

The main goal of the barrel scintillator is to provide time information. Test with final scintillating bar geometry using electron source and SensL units (Figure 30) shows an initial time resolution of the order of 450 ps (Figure 32). One possible contributor of this width is due from the solid angle emission of the Sr-90 on the surface of the bar. Resolution improvement can also be expected by correction of the timing based on the pulse charge in addition to the current CFD algorithm used (Figure 31).

[[File:image32.png|484x127px]]

Figure 30 - Time resolution setup. Test has been done on 3 SensL devices

[[File:image33.png|410x239px]]

Figure 31 -Signal sample and CFD timing extraction

[[File:image34.png|444x209px]]

Figure 32 - Initial time resolution without time versus charge correction.

= External and Endcap Scintillators =

This system comprise two set of scintillator circumventing the ALPHA-g detector. It serves the following purposes:

'''''External Scintillators'''''

These will consist of scintillator panel pairs external to the magnet, similar to those presently in use in ALPHA2. Their purpose is to provide antiproton counting during initial phase trapping and Hbar production studies. The 2 panels in a pair will be operated in coincidence and as well in coincidences with other pairs.

The design, fabrication and implementation is taken care by the ALPHA-g collaborator of Uni. of York (Scott Menary). The external scintillator is required in late 2017

''''' 
'''''

'''''Endcaps Scintillators'''''

The End caps is to close the “hole” at the top of the detector for catching the comics…

<blockquote>[[File:media/image35.png|281x212px]]
</blockquote>
Figure - Veto detector sketches

<blockquote>[[File:media/image36.png|281x211px]]
</blockquote>
The Veto endcap detector is to cover the missing coverage of the barrel Scintillator. Initial conceptual design has been put forward, but no final decision has been made on its final implementation.

= Specifications =

The following table summarize the characteristics of the ALPHA-g detector in term of mechanical, electronics and services.

{|
! '''Drift'''
! '''''Element'''''
! '''''unit'''''
! '''''Value'''''
|-
|

| Wire length
| mm
| 2300.0
|-
|

| Anode wire diam.
| um
| 30.0
|-
|

| Anode wire material
|

| Au/W
|-
|

| Anode wire tension
| g
| 40.0
|-
|

| Field wire diam.
| um
| 75.0
|-
|

| Field wire material
|

| Au/Cu/Be
|-
|

| Field wire tension
| g
| 120.0
|-
|

| Cathode pad size
| mm
| 3.8x37.1
|-
|

| Cathode pad pitch
| mm
| 4.0
|-
|

| # of pad per circumference
|

| 32.0
|-
|

| Cathode Voltage
| V
| -4000.0
|-
|

| Field Voltage
| V
| -223.0
|-
|

| Anode Voltage
| V
| 3200.0
|}

{|
! '''Gas'''
! '''''Element'''''
! '''''unit'''''
! '''''Value'''''
! '''''Additional info'''''
|-
|

| Gas mixture
|

| Ar/CO2
|

|-
|

| Gas mixture range
|

| 90/10 .. 50/50
|

|-
|

| Gas flow
| cc/min
| 300
|

|-
|

| Gas volume in detector
| l
| 178.8
|

|-
|

| Flushing time
| H
| 3.0
|

|-
|

| ip per cm
|

| 90.0
|

|-
|

| Drift length
| mm
| 64.8
| To the Field wires
|-
|

| E drift
| V/cm
| -617
|

|-
|

| Electron velocity
| cm/u - ns/mm
| 1.8
| 57.1
|-
|

| Diffusion longitudinal
| u/cm
| ~150
| Ar/CO2 70/30
|-
|

| Diffusion transversal
| u/cm
| ~130
| Ar/CO2 70/30
|}

{|
! '''Mechanics'''
! '''''Element'''''
! '''''unit'''''
! '''''Value'''''
!

! '''''Additional info'''''
|-
|

| Inner tube diam. including GND+protection
| mm
| 211.6
| 105.8
| 0.5mm of Faraday wall
|-
|

| Central Cathode inner tube diam.
| mm
| 218.4
| 109.2
| on which the cathode foil is 
glued, add 25um for foil thickness
|-
|

| Field wire position diam.
| mm
| 348.0
| 174
|

|-
|

| Anode wire position diam.
| mm
| 364.0
| 182
|

|-
|

| Cathode Pad position diam.
| mm
| 380.0
| 190
|

|-
|

| TPC active length
| mm
| 2304.0
|

|

|-
|

| TPC inner volume length
| mm
| 2354.0
|

|

|-
|

| Inner tube length
| mm
| 2392.6
|

| 8*228+2*44.3
|-
|

| Endplate thickness
| mm
| 12.5
|

|

|-
|

| Central cathode wall thickness
| mm
| 3.06
|

|

|-
|

| Outer cathode wall thickness
| mm
| 0.5
|

|

|-
|

| Laser centre radius
| mm
| 136.2
|

|

|-
|

| Barrel Scintillator bar length
| mm
| 2604.0
|

|

|-
|

| Barrel Scintillator inner diam.
| mm
| 446.0
| 223
|

|-
|

| Barrel Scintillator outer diam.
| mm
| 486.0
| 243
|

|-
|

| Barrel Scintillator geometry
| mm
| TopL23.9xBotL21.9xH20
|

| Trapezoidal
|}

{|
! '''Calibration'''
! '''''Element'''''
! '''''unit'''''
! '''''Value'''''
!

! '''''Additional info'''''
|-
|

| Number strips
|

| 7.0
|

|

|-
|

| Strip length
| mm/deg
|

|

|

|-
|

| Strip width
| mm
| 6.0
|

|

|-
|

| Strip pitch
| mm
| 380.0
|

|

|-
|

| First strip (top) position
| mm
| center
|

| center, +/-380, +/-760, +/-1140
|-
|

| Strip phi angle
| deg
| 360.0
|

|

|-
|

| Rod distance to central cathode
| mm
| 27.4
|

|

|-
|

| Laser beam diameter
| um
| 400.0
|

|

|-
|

| Beam offset on rod
| um
| 200.0
|

|

|-
|

| Beam tilt
| deg
| 1.3
|

|

|-
|

| Aluminum work function
| eV - nm
| 4.06
| 4.06 – 4.26
| 305.4
|-
|

| Silver work function
| eV - nm
| 4.27
| 4.26 – 4.74
| 291
|-
|

| Copper work function
| eV - nm
| 4.53
| 4.53 – 5.10
| 273.7
|-
|

| T2K results Al
| pe/mm2
| 2.0
|

| Ratio: 66.66666667
|-
|

| T2K results Cu
| pe/mm2
| 0.030
|

|

|}

{|
! '''Channels'''
! '''''Element'''''
! '''''unit'''''
! '''''Value'''''
!

! '''''Additional info'''''
|-
|

| Numbers of Anode wires
| -
| 256.0
|

|

|-
|

| Number of Field wires
| -
| 256.0
|

|

|-
|

| Number of rTPC sections
| -
| 8.0
|

|

|-
|

| Number of Pads per AFTER chip
| -
| 72.0
|

|

|-
|

| Number of AFTER per PadWing card
| -
| 4.0
|

|

|-
|

| Number of PadWing card per rTPC section
| -
| 8.0
|

|

|-
|

| Number of Pads per rTPC section
|

| 2304.0
|

|

|-
|

| Number of Scint. bars
| -
| 64.0
|

|

|-
|

| Number of SiPM per Scint. bar
| -
| 6.0
|

|

|-
|

| Total number of SiPM sensors
| -
| 768.0
|

|

|-
|

| Total number of Cathode Pads
| -
| 18432.0
|

|

|}

{|
! '''Electronics'''
! '''''Element'''''
! '''''unit'''''
! '''''Value'''''
!

! '''''Additional info'''''
|-
|

| Number of Anode Wire Boards AWB
| -
| 32.0
|

| Top(16) + Bot(16)
|-
|

| Number of Anode Card AWC
| -
| 32.0
|

| Top(16) + Bot(16)
|-
|

| Number of channels per AWB
| -
| 16.0
|

|

|-
|

| AWB power consumption
| A
| 0.3
|

| @ +5V
|-
|

| AWB power consumption
| A
| 0.3
|

| @ -5V
|-
|

| Total number of PadWings boards
| -
| 64.0
|

|

|-
|

| PWB power consumption
| A
| 1.5
|

| @ +5.0V
|-
|

| PWB power consumption
| A
| 1.0
|

| @ + 3.0V
|-
|

| Total number of Anode wire boards
| -
| 32.0
|

|

|-
|

| Total number of SiPM board
| -
| 32.0
|

|

|-
|

| Anode Wire WaveForm Sampling Freq.
| Msps
| 100.0
|

|

|-
|

| Number of Barrel Scint. boards BSB
| -
| 32.0
|

| Top(16)+Bot(16)
|-
|

| Barrel Scint. Waveform Sampling Freq.
| Msps
| 100.0
|

|

|-
|

| Grif-16 resolution
| bits
| 14.0
|

|

|-
|

| Grif-16 input range
| Vpk-to-pk
| 2.0
|

|

|-
|

| Grif-16 sampling rate
| Msps
| 100.0
|

|

|-
|

| Grif-16 FMC resolution
| bits
| 14.0
|

|

|-
|

| Grif-16 FMC input range
| Vpk-to-pk
| 2.0
|

|

|-
|

| Grif-16 FMC sampling rate
| Msps
| 62.5
|

|

|-
|

| Rack 43Ux600mmx800mm
|

|

|

| 1U=1.75" or 44.45mm
|}

Table 2 – Detector specification parameters list

File:Image10.jpeg

2019-07-24T20:45:00Z

Pierre:

Equipment

2018-09-12T13:12:04Z

Pierre:

Back to [[Main Page]]

= UPS - Tripp-Lite - Model SUINT1500LCD2U =

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* [[Image:UPS-TRIPP LITE-SUINT1500LCD2U.pdf|thumb|UPS-Tripp-Lite]]

= PL512 - WIENER - Low Voltage Power unit =

Cable plug STAK3N with the locking retainer STASI3

Hirschmann connector: https://sc2.premierfarnell.com/sc/product.aspx?productid=1176412
* [[Image:Manual_PL512_PL506_00679_A4.pdf|thumb|LV-PL512]]

= R1471 - CAEN - High Voltage Power Supply =
4 channels 0..8KV 3mA

* [[Image:R14xx_rev7.pdf|thumb|HV-R1470]]

= MV2 - Metrolab - 3-axis Hall device =

* [[Image:MagVector-MV2-Datasheet-v1.1.pdf|thumb|MV2]]

File:MagVector-MV2-Datasheet-v1.1.pdf

2018-09-12T13:11:40Z

Pierre:

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2018-09-12T13:10:18Z

Pierre:

Barrel Scintillator

2018-07-18T08:47:04Z

Pierre: /* Timing resolution */

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= Table of Figures =

= Purpose =
Antihydrogen annihilation identification in ALPHA crucially depends on the software capability to reject background events, i.e., cosmic rays. Given that the ALPHA-g detectors offer more information than what was available in ALPHA, new and more sophisticated algorithms will be developed to remove backgrounds events. Two types of tools will be deployed: “online” software aimed to monitor antihydrogen production and “machine learning algorithms” to eliminate background from the physics measurements.

While this software will provide the necessary rejection of the cosmic rays, the information collected for making this decision is based on a "Barrel Scintillator" layer surrounding the Radial TPC.
Particles traversing this detector will leave a track of light which is recorded in time and intensity. The time correlation between different parts of the Barrel Scint. will permit the identification of the source of the particle.

= Scope =

== Design of the Barrel Scintillator ==
The barrel scintillator is constituted of 64 scintillators bars and forms a barrel which surround the TPC. The following picture present the design of this barrel.

[[File:SiPM_assembly.png|frame|Light collection with Silicon PhotoMultipliers.]]

This cylinder is literally a barrel due to the fact that each bar has a trapezoidal section. This reinforce naturally the structural resistance and stability of the cylinder.
The amount of bar (64) is a compromised between the acceptable quantity of data, and the azimuth (φ) resolution. The length of each bar is 2.6 meter which is enough to cover the whole 2.4 meter TPC.

== Light collection ==
The scintillators bars are made from EJ200 plastic scintillator from the Texan company Eljen Technology ([Eljen2016]). A particle crossing this scintillator will produce light whose the wavelength is centered around 425 nm. This light is emitted in all direction and reach the Silicone PhotoMultiplier(SiPM) applied on each side of each bar.
The silicone Photomultipliers are the 6x6mm MicroFJ-60035 from the company SensL ([SensL2015]). The wavelength of the photon Detection Efficiency peak for these sensors is 420 nm, which correspond to the light emitted by the scintillator. Furthermore these sensors are bias with a low voltage (-30V) and have a small thickness (about 1mm) which make easier their integration in the read-out of the barrel scintillator.

Between the edge of the scintillator bar and the SiPM, a thin thickness (about 1-2 mm) of a transparent silicone rubber have been add in order to prevent any air gap. This silicone rubber is the RTV 615 product with 5% of hardener (by mass) which is commonly used to couple the photo-multipliers tubes to light guides. Previous tests have shown an increase of 30% in the light transmitted to the SiPM with this silicone rubber, in comparison with a set-up without any coupling material.
6 SiPMs are used for the read-out of the light of each edge of the bars. This means approximately 50% of the edge is covered by SiPM. This choice is a compromised between the space constraints (enough space have to be kept to support the weight of each bar), and the fact that the more the light is receive, the better the time resolution is.

== Electronic read-out ==
=== Overview ===
The goal of the electronic read-out of the barrel scintillator is to determine the time difference between the signals reaching the two opposite sides of a scintillator bar. Knowing this time difference, it is so possible to calculate the position of each events in the barrel, track the particles if several bars produce a signal, and determine if the event is due to a cosmic ray or an annihilation.

The calculation of the time difference is assured by a Time to Digital Converter (TDC), the TRB_V3 from GSI, which include 5 FPGAs, 256 channels and is able to measure a time with a resolution inferior to 14 ps ([Korcyl 2018]). To achieve the goal of the barrel scintillator, the time difference have to be calculated with a resolution of an order of 200 ps.

Some parts of the waveform of the SiPM signals are recorded too, in order to calculate a time correction based on the amount of photons received by the SiPM. This is ensured by an Analog to Digital Converter (ADC), the Alpha-16 card which support a 100 MHz channel.
In order to produce these data, several electronic cards have been designed:
:- The SiPM board: which support the 6 SiPM for each side of the scintillators bars.
:- The ASD card: ASD stand for Analog Sum Discriminator. This card receive the analog signal from the 6 SiPM amplify and sum these signals. And produce an analog and a digital signal respectively for the ADC and the TDC.
:- The Rear Transition Module (RTM), which distribute the signals to the ADC and the TDC.
:- The Power Distribution Card, which supply the voltage and the threshold level of the discriminator for the ASD card.

All of these parts appears in the following schematic.

[[File:Electronic read-out.png|Center|Sketch of the electronic read-out.]]

On the ASD card, the signals of the 6 SiPM are amplified and sum in order to get a signal of an order of one or two volts. This signal is then used to feed a discriminator stage as well as a stretching stage.

=== TDC signal ===
The discriminator stage generate an LVPECL signal each time the sum of the six SiPM reach a certain threshold. This threshold is generated by a Digital to Analog Converter (DAC) which is monitored from the Power Distribution Card. The resolution of this threshold is of an order of a photo-electron volts, which allow the discriminator to detect low amplitude signals which are just above the dark noise.
The LVPECL signal is converted in an LVDS signal on the Rear Transition Module (RTM). As there is about 8 meters of cable between the ASD card and the TDC, this allow to generate a clean and sharp signal right before the TDC.
Previous test realized with this electronic and with cosmic ray events in the middle of the bar have shown a time difference resolution of an order of 160 ps without any time correction.

=== ADC signal ===
The waveform of the six SiPM sum is used to calculate a time correction as well, based on an estimation of the amount of photon reaching the SiPMs. This estimation might be realized with the area under the waveform, which is proportional to the charge of the SiPM; however for important amount of photon, the signal will probably be saturated. The other way is to look at the beginning of the rising edge of the signal. Thus, in order to have a sufficient resolution in this particular area, the signal is stretched before reaching the 100 MHz ADC.

= Definitions and Abbreviations =

General acronyms or terms used for the ALPHA-g experiment

{|
| rTPC
| Radial Time projection Chamber
|-
| z
| Coordinate along the main axis of the trap and rTPC
|-
| φ
| Azimuthal coordinate, φ = 0 is in direction of cartesian x
|-
| θ
| Angle towards the z-axis
|-
| r
| Radial coordinate in the cylindrical rTPC system
|-
| pφ
| φ component of the pion's original momentum
|-
| pθ
| θ component of the pion's original momentum
|-
| GEANT4
| GEometry ANd Tracking, particle physics simulation package
|-
| Garfield++
| Gas detector simulation package
|}

''Table'' 1 ''– ALPHA-g Abbreviations''

= References and Related Documents =

{| class="wikitable"
|+References
|-
|Eljen 2016
|Eljen Technology, “''General Purpose Plastic Scintillator EJ-200, EJ-204, EJ-208, EJ-212''”, January 2016.
|-
|Korcyl 2018
|Grzegorz Korcyl, Ludwig Maier, Jan Michel, Andreas Neiser, Marek Palka, Manuel Penschuck, Pawel Strzempek, Michael Traxler, Cahit Ugur, “''A Users Guide to the TRB3 and FPGA-TDC Based Platforms''”, March 2018.
|-
|SensL 2015
|SensL, “''J-Series High PDE and Timing Resolution, TSV Package – Datasheet''”, 2015.
|}

= Studies =
=== Timing resolution ===

The time resolution is an important factor in the barrel scintillator acquisitions and is directly linked to the capability of the barrel to act as a veto, ie. to discriminate the events coming from outside (from cosmic rays) to the events coming from inside the barrel (annihilation of anti-particle).

The time which matter in this chapter is the difference of time between the signals generated by each side of one bar, when a particle cross the bar and produce an event.
Some of the factors involved in this time resolution are:
::- The decay time of the scintillator: all the photons are not generated at the same time but following a law with a constant decay (equal to 2.1 ns for the EJ200 scintillator plastic).
::- The reflections of the photons inside the bars which delayed the time of arrival of some photon.
::- The variation in the amount of photon generated for each event. This influence the shape and the rising time of the analog signal generated by the SiPM, and so the measured time of arrival.
::- The jitter of the electronics components propagating the signal up to the TDC.
::- The data analysis.

To experimentally measure the time resolution it is although important to be as close as possible to the final read-out design.
In the experiment made at Triumf, a bar of the future barrel scintillator was used, as well as the final SiPM board, a prototype of the ASD card, the final cables (type and length), and the TDC which will be used for the ALPHA-g experiment.

For this experiment, smaller scintillators (linked to PMT) were used to trigger the TDC and look at the events generated in the middle of the bar only.
The following schematic described the set-up of the experiment:

[[File:TimeResolutionExperiment.png|Center|200px|Sketch of experiment for the time resolution.]]

In this experiment, the sigma of the time difference measured with the TDC is equal to 157 ps. This result appears on the following figure.

[[File:TimeResolutionResult.png|Center|Time difference results acquired with the TDC.]]

The goal for this experiment was to reach 200 ps of time resolution, although this result meet the timing requirement to use the barrel scintillator as a veto.

=== Amplitude correction ===

= Mechanical structure =
Description
dwg, assembly

= Results =
== trigger on T0 (T1,T2) ==

== T1-T2 position / time reconstruction ==

= Appendix =

Equipment

2018-07-18T08:28:23Z

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* [[Image:UPS-TRIPP LITE-SUINT1500LCD2U.pdf|thumb|UPS-Tripp-Lite]]

-=PL512 - WIENER - Low Voltage Power unit =

Cable plug STAK3N with the locking retainer STASI3

Hirschmann connector: https://sc2.premierfarnell.com/sc/product.aspx?productid=1176412
* [[Image:Manual_PL512_PL506_00679_A4.pdf|thumb|LV-PL512]]

= R1471 - CAEN - High Voltage Power Supply =
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* [[Image:R14xx_rev7.pdf|thumb|HV-R1470]]

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* [[Image:UPS-TRIPP LITE-SUINT1500LCD2U.pdf|thumb|UPS-Tripp-Lite]]

- PL512 - WIENER - Low Voltage Power unit

Cable plug STAK3N with the locking retainer STASI3

Hirschmann connector: https://sc2.premierfarnell.com/sc/product.aspx?productid=1176412
* [[Image:Manual_PL512_PL506_00679_A4.pdf|thumb|LV-PL512]]

- R1471 - CAEN - High Voltage Power Supply
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* [[Image:R14xx_rev7.pdf|thumb|HV-R1470]]

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* [[Image:UPS-TRIPP LITE-SUINT1500LCD2U.pdf|thumb|UPS-Tripp-Lite]]

- PL512 - WIENER - Low Voltage Power unit

Cable plug STAK3N with the locking retainer STASI3
Hirschmann connector: https://sc2.premierfarnell.com/sc/product.aspx?productid=1176412
* [[Image:Manual_PL512_PL506_00679_A4.pdf|thumb|LV-PL512]]

- R1471 - CAEN - High Voltage Power Supply
4 channels 0..8KV 3mA
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* [[Image:UPS-TRIPP LITE-SUINT1500LCD2U.pdf|thumb|UPS-Tripp-Lite]]

- PL512 - WIENER - Low Voltage Power unit

Cable plug STAK3N with the locking retainer STASI3
Hirschmann connector: https://sc2.premierfarnell.com/sc/product.aspx?productid=1176412
* [[Image:Manual_PL512_PL506_00679_A4.pdf|thumb|LV-PL512]]

- R1471 - CAEN - High Voltage Power Supply
4 channels 0..8KV 3mA
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* [[Image:UPS-TRIPP LITE-SUINT1500LCD2U.pdf|thumb|UPS-Tripp-Lite]]

- PL512 - WIENER - Low Voltage Power unit

Cable plug STAK3N with the locking retainer STASI3
Hirschmann connector: https://sc2.premierfarnell.com/sc/product.aspx?productid=1176412
* [[Image:Manual_PL512_PL506_00679_A4.pdf|thumb|LV-PL512]]

- R1471 - CAEN - High Voltage Power Supply
4 channels 0..8KV 3mA
* [[Image:R14xx_rev7.pdf|thumb|HV-R1470.pdf]]

File:R14xx rev7.pdf

2018-07-18T08:21:15Z

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* [[Image:UPS-TRIPP LITE-SUINT1500LCD2U.pdf|thumb|UPS-Tripp-Lite]]

- PL512 - WIENER - Low Voltage Power unit

Cable plug STAK3N with the locking retainer STASI3
Hirschmann connector: https://sc2.premierfarnell.com/sc/product.aspx?productid=1176412
* [[Image:Manual_PL512_PL506_00679_A4.pdf|thumb|LV-PL512]]

- R1471 - CAEN - High Voltage Power Supply
4 channels 0..8KV 3mA
* [[Image:R14xx_rev7.pdf|thumb|HV-R1470]]

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2018-07-18T08:14:42Z

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* [[Image:UPS-TRIPP LITE-SUINT1500LCD2U.pdf|thumb|UPS-Tripp-Lite]]

- PL512 - WIENER - Low Voltage Power unit

Cable plug STAK3N with the locking retainer STASI3
Hirschmann connector: https://sc2.premierfarnell.com/sc/product.aspx?productid=1176412
* [[Image:Manual_PL512_PL506_00679_A4.pdf|thumb|LV-PL512]]

-

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PL512 - WIENER - Low Voltage Power unit
* [[Image:Manual_PL512_PL506_00679_A4.pdf|thumb|LV-PL512]]
Cable plug STAK3N with the locking retainer STASI3
Hirschmann connector: https://sc2.premierfarnell.com/sc/product.aspx?productid=1176412

Equipment

2018-07-18T08:07:47Z

Pierre:

File:Manual PL512 PL506 00679 A4.pdf

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Main Page

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Pierre: /* temporary index */

This is the new wiki for the ALPHA-g detector and daq.

== Links ==

* agdaq midas status page: https://alphagdaq.triumf.ca
* elog: https://daq.triumf.ca/elog-alphag/alphag/

== temporary index ==

* [[test]]
* [[alphat]] -- trigger ALPHA-T (GRIF-C) manual
* https://daq.triumf.ca/DaqWiki/index.php/VME-CDM -- clock VME-CDM manual
* https://daq.triumf.ca/DaqWiki/index.php/VME-GRIF-ADC16-Rev1 -- GRIF-16 ADC manual
* [[pwb]] -- TPC Pad Wing Board manual
* [[daq]] -- DAQ manual
* [[Equipment]] -- Equipment manuals

== Documentation ==

General information about the Alpha-g Radial Time Projection Chamber (rTPC)

* [[Detector Overview]] : Design note
* [[Detector Simulations]] : Simulation and track recontruction
* [[Mechanical Design]] : Mechanical design of the rTPC
* [[Detector Data Acquistion]] : Computer and Back-end considerations
* [[Detector Calibration]] : Laser calibration scheme
* [[Detector Electronics]] : Front-end and digitizers
* [[Detector Services]] : Gas, Water cooling, Power distribution
* [[Barrel Scintillator]] : Cosmic veto detector

== Mediawiki default blurb ==

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File:UPS-TRIPP LITE-SUINT1500LCD2U.pdf

2018-07-18T07:57:27Z

Pierre:

Eqp

2018-07-18T07:56:57Z

Pierre: Created page with "Back to Main Page"

Back to [[Main Page]]

Main Page

2018-07-18T07:55:48Z

Pierre:

This is the new wiki for the ALPHA-g detector and daq.

== Links ==

* agdaq midas status page: https://alphagdaq.triumf.ca
* elog: https://daq.triumf.ca/elog-alphag/alphag/

== temporary index ==

* [[test]]
* [[alphat]] -- trigger ALPHA-T (GRIF-C) manual
* https://daq.triumf.ca/DaqWiki/index.php/VME-CDM -- clock VME-CDM manual
* https://daq.triumf.ca/DaqWiki/index.php/VME-GRIF-ADC16-Rev1 -- GRIF-16 ADC manual
* [[pwb]] -- TPC Pad Wing Board manual
* [[daq]] -- DAQ manual
* [[Eqp]] -- Equipment manuals

== Documentation ==

General information about the Alpha-g Radial Time Projection Chamber (rTPC)

* [[Detector Overview]] : Design note
* [[Detector Simulations]] : Simulation and track recontruction
* [[Mechanical Design]] : Mechanical design of the rTPC
* [[Detector Data Acquistion]] : Computer and Back-end considerations
* [[Detector Calibration]] : Laser calibration scheme
* [[Detector Electronics]] : Front-end and digitizers
* [[Detector Services]] : Gas, Water cooling, Power distribution
* [[Barrel Scintillator]] : Cosmic veto detector

== Mediawiki default blurb ==

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PWB

2018-06-05T23:14:26Z

Pierre: /* Schematics */

= Links =

* https://bitbucket.org/teamalphag/pwb_rev1_firmware
* https://edev-group.triumf.ca/fw/exp/alphag/feam/rev1

= Schematics =

* [[Image:pwb_rev0.pdf]]
* [[Image:Pwb-rev1-after.pdf]]
* [[Image:AlphaG Rev1.pdf]]

= ZZZ =

ZZZ

PWB

2018-06-05T23:13:24Z

Pierre: /* Schematics */

File:AlphaG Rev1.pdf

2018-06-05T23:12:28Z

Pierre:

File:Pwb-rev1-after.pdf

2018-06-05T23:03:50Z

Pierre:

Barrel Scintillator

2018-04-11T15:57:35Z

Pierre: /* Purpose */

Barrel Scintillator

2018-04-10T21:16:31Z

Pierre:

Detector Electronics

2018-04-09T23:48:11Z

Pierre: /* FMC – Alpha ADC32 */

Back to [[Main Page]]

= Table of Figures =

[[#_Toc493676266|Figure 1 - Overall Data Acquisition scheme 7]]

[[#_Toc493676267|Figure 2 - Anode wire pre-amplification block diagram 8]]

[[#_Toc493676268|Figure 3 - Anode Wire Board (AWB), 16 channels pre-amplifier 9]]

[[#_Toc493676269|Figure 4 - 4 consecutive anode wire signals 9]]

[[#_Toc493676270|Figure 5 - Anode wire pre-amp gain map for half the chamber circumference 10]]

[[#_Toc493676271|Figure 6 - Alpha16 Data Acquisition Board 12]]

[[#_Toc493676272|Figure 7 - Grif16 Acquisition Module Block Diagram on which the Alpha-16 is based 12]]

[[#_Toc493676273|Figure 8 - Model of the new 32channels 12bit @ 65Msps FMC produced in 2016. 13]]

[[#_Toc493676274|Figure 9 - FMC Alpha-ADC32 Block Diagram 13]]

[[#_Toc493676275|Figure 10 - Cathode Pad Board readout for 288 channels at 62.5Msps, visible 4 AFTER chips, 3 copper bars running under the central board for power distribution 15]]

[[#_Toc493676276|Figure 11 – Thermal image of the FEAM with hot spot temperature: without cooling plate (78°C), with cooling plate (45°C), with cooling plate & water cooling (36°C) 16]]

[[#_Toc493676277|Figure 12 - Block diagram of AFTER amplifier 17]]

[[#_Toc493676278|Figure 13 - 4 x 72 cathode pad signals, overall time width corresponds to the drift time 17]]

[[#_Toc493676279|Figure 14 - Block diagram of one channel of SiPM amplifier 18]]

[[#_Toc493676280|Figure 15 - Trigger Card Adapter and Trigger Card 19]]

[[#_Toc493676281|Figure 16 Trigger Card to FEAM 19]]

[[#_Toc493676282|Figure 17 - Clock Distribution Module 20]]

[[#_Toc493676283|Figure 18 - IO Block Diagram 21]]

[[#_Toc493676284|Figure 19 - ALPHA-16 and CDM board in front with the Trigger/Clock distribution cables 22]]

[[#_Toc493676285|Figure 20 - Hit Detector for the Anode wire and scintillators in ALPHA-16 24]]

[[#_Toc493676286|Figure 21 - AFTER chip WFD on the PADWINGS 25]]

[[#_Toc493676287|Figure 22 - Trigger decision on ALPHA-T 26]]

[[#_Toc493676288|Figure 23 - ESPER Web Display. Test pulse recorded by the FEAM cards. Individual AFTER chip configuration is visible (gain change, delay). 27]]

= Introduction =

This design note describes the electronics chain and components for the readout of the ALPHA-g TPC and barrel scintillator bars.

= Scope =

The Detector Electronics is composed of 3 independent signal sources:

# Anode Wire signals path
# Cathode Pad signals path
# Barrel Scintillator signals path.

All 3 sources provide a similar function such as signal amplification and conditioning (shaping).

= Definitions and Abbreviations =

General acronyms or terms used for the ALPHA-g experiment

{|
! TPC
! Radial Time projection Chamber
|-
| Pads
| PCB surface seeing the induced anode wire signal
|-
| SiPM
| Si photomultipliers used to detect scintillation light
|-
| ADC
| Analog to digital converter
|-
| ASIC
| Application specific integrated circuit
|-
| SCA
| Switch Capacitor Array ( A type of Waveform Digitizer)
|-
| TDC
| Time to digital converter
|-
| BSM
| Barrel Scintillator Module (64 bars sub-assembly)
|-
| FEAM, Padwing
| Cathode strip acquisition board
|-
| CDM
| Clock Distribution Module
|-
| BSB
| Barrel Scintillator Board
|-
| WFD
| Waveform Digitizer
|}

Table 1 – ALPHA-g Abbreviations

= References and related Document =

* AFTER manual
* SensL SPM data sheet
* Edev-group.triumf.ca: contains the FW information on all the Alpha-g custom cards ([https://edev-group.triumf.ca/fw/exp/alphag/feam/rev0/wikis/feam-test-packet-format https://edev-group.triumf.ca/fw/exp/alphag])

* ''' 
'''

= Overall Detector Signal Path =

The Alpha-g detector provides 3 analog signals that are collected for the track reconstruction to help on the annihilation location in the trap.

* The anode wire signal providing the drift time of the electron through the detector for an angular position.
* The cathode pad signal, which are in-time correlated to the anode wire signal, providing the amplitude of these signals from which the longitudinal position (Z) can be extracted.
* The Barrel Scintillator bar signals provide the time and amplitude of the particle crossing the detector. The Barrel Scintillator is mainly to reject cosmic events. For that purpose, the timing resolution is important. Therefore the BSM analog signal is split early in the chain to record the amplitude and time separately.

The anode wires and the barrel scintillator bars are read out from both ends to provide a coarse Z-position as well. The Data acquisition is therefore made for reading 2x256 anode wire channels, 2x64 barrel scintillator bars and 18432 channels of cathode pads covering the outer detector cylinder.

[[File:image2daq.png|876x559px]]

Figure 1 - Overall Data Acquisition scheme

= Anode wire signal path =

The design for the anode wires pre-amplifier is based on work done for several other projects used at TRIUMF and other labs.

Each of the 256 anode wires is read-out from two ends. The signals are used to (1) determine phi-position of ionization track; (2) reconstruct its z-position by weighting signals from two wire ends; (3) generate trigger signal. The pre-amplifiers convert the induced current to voltage that is digitized and processed in the readout system. The main requirements for the amplifier circuit are:

# Input impedance must be low enough so detected charge is sensitive to position of event along wire;
# The shape of signal is optimized for sampling frequency (16 ns) and for fast trigger timing (few ns accuracy);
# Linearity range adjusted for ADC used;
# Gain is adjusted for gas amplification of 105
# Amplifier noise is low enough to detect single-electron cluster.

[[File:image3daq.png|576x204px]]

Figure 2 - Anode wire pre-amplification block diagram

Anode wires are HV-decoupled before connected to the amplifier, but additional (not HV) decoupling is needed at amplifier input to accommodate non-zero potential of the input stage. Protection of the amplifier input is using a standard bi-diode configuration. The first stage is a current-sensitive loop with input impedance defined by resistor Rin and trans-impedance (gain) by feedback resistor Rf. The second stage is 2-pole shaper with shaping time constant defined by components Rs and Cs. The last stage is a cable driver.

Overall gain, transfer function and input impedance of the circuit can be adjusted by changing passive components. This adjustment will be done by studying the TPC prototypes.

Amplifiers are deployed on 16-channel cards, 16 boards serve each end of TPC. They are powered by standard +5V and -5V linear supplies. Each card has a test input that is used to measure amplifiers response and to check for malfunction.

[[File:image4daq.jpg|273x283px]] [[File:image5daq.png|269x284px]]

Figure 3 - Anode Wire Board (AWB), 16 channels pre-amplifier

The AWB schematic allows for bipolar signal input. This has the advantage to reproduce the full anode wire signal development including the inverted induced pulse from neighbouring wires as seen Figure 4.

[[File:image6daq.jpg|512x358px]]

Figure 4 - 4 consecutive anode wire signals

The anode pre-amps have an individual test pulse input to provide a quick functional test. It can also be used for calibration purpose. Several tests have been done in this regard, but the overall chain gain is dependent on many variables (chamber geometry, environmental condition (Gas mixture, T, P), pre-amp (layout, components)). Another more common test pulse injection is available by pulsing all the field wires at once (at the boundary of the drift and multiplication region). This technique has the advantage to produce an induced signal on all the anode wires and cathode pads together at the “same” time. Figure 5 shows the gain variation by wire seen when pulsed through the field wire. 2 interesting features are visible:

a) An overall negative slope, indicated by the linear fit. This slope is explained by the pulse attenuation through the field wires distribution.

b) A clear increase in gain for the wires near the anode wire card boundaries, indicated by the cyan lines is not yet well understood. A further test is planned.

[[File:image7daq.png[497x389px]]

Figure 5 - Anode wire pre-amp gain map for half the chamber circumference

== Anode Wire Waveform digitizer (Alpha-16) ==

The output of the AWB is presented to the Alpha-16 waveform digitizer sampling the analog signal at 62.5Msps.

'''''Note:''''' At the time of this report, the WFD 62.5Msps is not yet available. We use the WFD at 100Msps to perform the tests. The firmware is similar to the 62.5Msps and the final test will be reproduced later.

This module provides 16 channels 14bit ADC @100Msps for 50Ohms single-ended analog signal for the barrel scintillator. It also supports a dedicated mezzanine card (FMC) handling 32 channels 12bit ADC @ 65Msps for single-ended 50Ohms analog signals for the Anode wires.

The Alpha-16 board outputs (16ch.@100Msps and 32ch.@62.5Msps) are collected on the main carrier FPGA for transmission through Ethernet to the backend computer.

The board carries multiple I/O connections required for the module configuration, communication, data transfer, signal inputs, see Figure 7.

* Front panel SFP Gbit Ethernet (copper/fiber)
* Front panel eSATA: clock and sync inputs
* Front panel dual LEMO: Diagnostic DAC outputs (250Msps)
* Front panel MCX connector for 16 x ADC inputs
* Rear entry P2 connector for 16 x ADC inputs
* A24/D16 VME interface to MAXV configuration CPLD
** VME configuration flash updates
** VME bridge to FPGA
* FMC custom module connections.
** Dual MiniSAS for Acquisition setup
** 10 x5Gibt Link
** JESD204B Clocks
** Supports 32 Channel ADC LVDS interface
* Amplifier input switches: Front panel MCX connector, Rear Transition Card SMA connector
* Amplifier Gain x1 and x4
* Switch selectable LEMO NIM Input/ DAC outputs
* Micro SD Flash
* DDR3 DRAM – 667MHz – 128M x 23'''(MT41J128M16HA-15E)'''
* FPGA - Arria V '''(5AGXFB3H4F35C4N)'''
* MAXV CPLD controller '''(5M2210ZF256C5N)''' for USB JTAG and VME access

[[File:image8daq.jpg|218x380px]]

Figure 6. Alpha16 Data Acquisition Board

[[File:image9daq.png|264x383px]]

Figure 7. Grif16 Acquisition Module Block Diagram on which the Alpha-16 is based

== FMC – Alpha ADC32 ==

<blockquote>The FMC – ALPHA ADC32 provides single-stage amplification of up to 32 single-ended 50Ohms analog signals, from the Anode Wire Board Pre-Amplifier, to drive two 16 channel 14bit differential, analog to digital converters sampling at 65MSPS. Further, each ADC will provide a 0.9V common mode offset voltage to be fed into the differential driver

A 16 channel 12 bit digital-to-analog (DAC) converter is used to individually apply an appropriate offset voltage to each of the differential amplifier pairs. The Offset voltages span from 0V to 2.5Vat 1.22mV increments and will output 0V upon power cycle. The DAC is configurable via an SPI interface via the FMC connector.

ADC32 board has the capability to receive and transmit an LVDS clock signal through the eSATA connector which is fed to the FMC connector
</blockquote>
[[File:image10daq.png|318x307px]]

Figure 8 - Model of the new 32channels 12bit @ 65Msps FMC produced in 2016.

[[File:image11daq.png|420x285px]]

Figure 9 - FMC Alpha-ADC32 Block Diagram

<blockquote>''These notes are for the current revision of the Alpha ADC32, a new revision is currently being talked about''
</blockquote>
The board is composed of the following elements:

* 400 Pin FMC connector
** Provides SPI interface
** ADC Synchronization
** Support for 32 LVDS analog signals
** Supply voltage of fused +12V, Switched 3.3V and 1.2-3.3V adjustable
* 32 channel Analog inputs via Hirose connector '''[FX2-40S-1.27DS(71)] 
'''
* 1V analog reference voltage '''[LTC6655BHMS8-3#PBF]'''
** ±2ppm
* Differential ADC Driver '''[ADA4950'''-'''2YCPZ]'''
** ±0.2mV Offset
** 9.2nHz / √Hz Output voltage Noise at Gain=1
** Adjustable output common-mode voltage
** Hardware programmable gain of 1x, 2x and 3x
* Dual 16 channel 14bit Analog to Digital converter '''[AD9249BBCZ-65]'''
** 2Vp-p input range
** 65MSPS
** ±0.6LSB
** Input Clock of 10-520MHz
* 16 channel 12bit Digital to Analog converter '''[ADA4950-2YCPZ]'''
** Programmable offset voltage
** SPI configurable outputs
** Output range ±2.5V, 0V upon reset
** 1.22mV/LSB
* 1 x eSATA Clk-In / Clk-out to and from FMC connector

= Cathode pad signal path =

The 18432 cathode pads covering the inner surface of the outer wall of the detector are individually connected to a signal acquisition chain. This collected signals will provide the position of the electron avalanche at the anode wire. Combining them in charge, permit the reconstruction of the track passing through the longitudinal direction the detector. While the cathode pads cover a large area (2.7m2), the actual footprint per channel is limited (3.8mmx37.1mm). Therefore a high-density waveform digitizer chain has been chosen based on our previous experience with the T2K experiment, we opted for the AFTER Switched Capacitor Array (SCA) ASIC. The analog signal path is short as the pads themselves are on the backside the physical outer cylinder of the detector and the input signal connectors to the AFTER chips are on the opposite side of the outer cylinder.

A custom frontend board (FEAM) see Figure 10 handling 288 individual cathode pads has been designed. It is composed of 4 ASIC AFTER (72 channels) with associated waveform digitizer for the individual signal on 512 cells at 20Msps. In addition, an FPGA manages the board services and the data collection and transmission through a 1 gigabit/sec optical link to the Ethernet using the UDP protocol.

While the power consumption per channel at the ASIC level is low, the power requirement is in the order of 15W per board for a total at the detector level approaching 1000W. This required proper cooling to maintain a reliable operation of the electronics. Figure 11 shows the board temperature with and without cooling plate. Thermal images have been taken to confirm the temperature reduction of the main heat source (Clock cleaner, FPGA, ADC, AFTER in that order). We can guarantee a chip temperature below 60°C to keep the default chip MTBF.

[[File:image12daq.jpg|858x546px]]

Figure 10 - Cathode Pad Board readout for 288 channels at 62.5Msps, visible 4 AFTER chips, 3 copper bars running under the central board for power distribution

[[File:image13daq.png|249x185px]]
[[File:image14daq.png|247x186px]]
[[File:image15daq.jpg|248x186px]]

Figure 11 – Thermal image of the FEAM with hot spot temperature: without cooling plate (78°C), with cooling plate (45°C), with cooling plate & water cooling (36°C)

== Cathode Pad Circuit ==

The cathode pads are read-out by AFTER ASIC which diagram is presented in Figure 12. Each channel consists of a charge-sensitive preamplifier, pole-zero cancellation of preamplifier decay time, RC2 shaper and 512-cell SCA to store the waveform. Amplifier gain, pole-zero time constant and shaping time are programmable.

{|
|
[[File:image16daq.png[561x371px]]

Figure 12 - Block diagram of AFTER amplifier
| [[File:image17daq.png|415x399px]]
|}

The acquisition of the FEAM cards is operational and initial waveforms can be displayed as seen in Figure 13. This visualization is for monitoring the individual channels only. The data acquisition is using a different path for fast data collection. Figure 13 shows cathode signal examples collected by the FEAM card. The signal shape is consistent with avalanches occurring from a cosmic track going through the detector. The initial pulse corresponds to the early avalanches when the track crosses the amplification region (near the anode wire). The remaining pulses show the later electron avalanches reaching the same anode wire from the drift region due to the track angle. The complex pulse shape from the drift region reflects the convolution in this time base of the arrival of the electron to the amplification region and the induced pulse from the resulting electron avalanche.

= Barrel Scintillator signal path =

'''''Note''''': While the Barrel Scintillator is part of the Alpha-g detector for cosmic rejection purpose, this section is still under development. The initial concept and implementation are therefore not final. The volume allocated for it in the other hand well defined due to external to the detector constraints.

Light at both ends of each bar of the barrel scintillator is collected for a rough position detection of the crossing particle and timing information. To improve the detection information (maximize photon collection), 6 individual SiPM light detector (SensL) are mounted on both ends of the individual scintillator bar for a coverage of 50% of the bar. This assembly is in a light-tight and gas-tight enclosure. A cold gas flows through the box to lower the SiPM temperature operation in order to reduce the dark noise of the device. A shaper/amplifier board (BSB) will be mounted on the outside of the enclosure. Each of the board will acquire the signals of 4 adjacent scintillator bars. In total 64 scintillator bars are read out by 16 boards at each end. A block diagram of one bar readout is shown in Figure 14. The signal gathering of the 6 sensors is based on an analog sum.

[[File:image18daq.png|480x296px]]

Figure 14 - Block diagram of one channel of SiPM amplifier

The 6 pre-amplifier outputs are combined to provide the sum of 6 signals. This resulting signal is further amplified and shaped (if necessary) on a second stage post-amplifier/discriminator. This signal sent to the readout system through a cable driver. Two signals will be acquired from each bar: (1) Analog sum fed to a waveform digitizer with proper digital processing to determine event position and timing; (2) LVDS signal fed to a TDC for off-line precise timing measurement purposes. For the LVDS signal, the post-amplifier will have a controlled threshold voltage to the signal comparator.

The BSB will be powered by standard +5V and -5V linear supplies. Each board has a test input to allow individual board measure of the amplifier response, malfunction test and to provide the necessary services to the light sensors device (Voltage bias, temperature sensor, etc).

The output of the analog output of the BSB will be shaped for the 100Msps WFD and in parallel will issue a digital signal for timing information to a TDC.

= Trigger Distribution =

On the full-length detector, the FEAM boards will receive trigger and clock signals from the CDM through the Trigger Card Adapter. The adapter receives signals from the CDM via a 7 pin SATA connector. The signals can be re-driven by repeaters on the adapter and are sent down a chain of 7 Trigger Cards with the adapter forming the first link.

While there are other elegant means of distributing the common clock and trigger to all the electronics boards, this method is the most simple and robust.

[[File:image19daq.png|195x575px|Adapter]]

[[File:image20daq.png|573x43px|Trigger_Board]]

Figure 15 - Trigger Card Adapter and Trigger Card

[[File:image21daq.jpg|216x294px|20170914_101103_resized]]

Figure 16 Trigger Card to FEAM

A Samtec SFM-110 connects each card to a FEAM board and also provides through holes pins where another card can be overlapped and soldered. In this manner the chain of Trigger Distribution Cards is formed, providing a shared clock and trigger signal to a column of 8 FEAM boards.

= Clock Distribution Module =

[[File:image22daq.png|231x356px]]

Figure 17 - Clock Distribution Module

* 6x LEMO Connectors [2 Output, 4 Input]
* 6x Mini-SAS providing up to 24 channels of clock and synchronization breakout
* 1x Combination eSATA/USB connector
** eSATA provides CLK and SYNC
** USB provides USB to Serial communication 115200 BAUD
* 1x 10/100 Base-TX Ethernet
* Optional Atomic Clock module support, 10MHz and 1PPS '''[CSAC - SA.45s]'''
** Short term Stability <1E-11
** over 1000 seconds (100μHz / 1000s)
** Aging rate of <9E-10 per month '''('''9mHz/month)
* Onboard 10MHz Crystal Oscillator '''[FOX924B-10.000]'''
** ±2.5ppm
** ±1ppm per year
* JTAG ARM Support
* SmartFusion2 SoC '''[MS2-FG484]'''
* Ultra-low noise clock jitter cleaner 3:15 input to output support '''[LMK04821] '''
** Min/Max VCO Frequency 2750/3072MHz
** 0.111RMS Jitter
* TTL and NIM signal compatibility for external CLK and SYNC
* VME - 6U - 3Row
* Approximate Current Draw 1.837A at 5V

The Clock Distribution Module ('''CDM)''' has the capability to distribute two externally sourced clock and synchronization signals to six mini-SAS connections for total 24 signal signals. The external signals are provided through the eSATA and LEMO 1A/B Connectors. The module also has the capability to add an Atomic clock that outputs a 10Mhz signal and a 1 Pulse Per Second (PPS), as well as user-defined synchronization signal. Lastly, the module can be configured to output the external clock signals to the LEMO 2B connector or VME bus.

[[File:image23daq.png|509x348px]]

Figure 18 - IO Block Diagram

[[File:image24daq.png|299x412px]]

Figure 19 - ALPHA-16 and CDM board in front with the Trigger/Clock distribution cables

= Frontend Board Firmware =

The firmware (FW) refers to the embedded code running on the Field Programmable Gate Arrays (FPGAs) and microcontrollers (MCUs) located on the various modules within the experiment. These devices store, load, and run the programs required for operation of the different digital electronic components within the experiment.

Firmware code is essential to the operation of the detector as it provides the mechanism to configure the hardware for its particular purpose. Such as analog-to-digital conversion, data filtering, data trigger composition, transport of the data, and orchestration of all the different hardware modules to succeed in acquiring meaningful information across the overall system. Some of the firmware tasks are:

<ol style="list-style-type: upper-roman;">
<li>Low-level acquisition of the 3 different WFDigitizers (Anode wire, Cathode pad, Barrel Scintillator)</li>
<li>Links all the electronics boards to the DAQ system.</li>
<li>Collected in real-time information for trigger decision making.</li>
<li>Distribute synchronization signals and trigger to all the acquisition boards.</li>
<li>Provides to the user; configurable board and operation parameters settings.</li>
<li>Provides board monitoring and debugging tools.</li></ol>

Most of the FW code base has been based off of prior code developed for the currently running GRIFFIN experiment, with some exceptions, such as the Trigger Master Module which needed custom code specific to ALPHA-g, and the PADWING, which contained the AFTER SCA chip not present in GRIFFIN.



The firmware code is loaded onto the hardware board where an FPGA or MCU is present. Each firmware module has specific firmware capabilities, detailed as follows:

* Hit Detector firmware Module (ALPHA-16 carrier board)
** Anode Wire and Barrel Scint. signal waveform digitizers acquisition
** Local data filtering for Trigger purpose
** Transmission of summary data to Trigger Module for trigger decision
** Data compression/filtering and retention for transmission to backend on Trigger reception
** Monitoring of hardware functions (U,I,T)
** Configuration of hardware mechanism
** Update of firmware code mechanism
* Pad Acquisition firmware Module (PADWING board)
** Cathode pad signal waveform digitizers acquisition
** Data compression/filtering and retention for transmission to backend on Trigger reception
** Monitoring of hardware functions (U,I,T)
** Configuration of hardware mechanism
** Update of firmware code mechanism
* Master Trigger firmware Module (ALPHA-T board)
** Summary data reception of the multiple GRIF-16 boards
** Trigger decision algorithm
** Packaging of Trigger decision information and transmission to the backend.
** Monitoring of hardware functions (U,I,T)
** Configuration of hardware mechanism
** Update of firmware code mechanism
* Clock and Trigger Distribution firmware Module (CDM board)
** Monitoring of hardware functions (U,I,T,Clock Frequency)
** Configuration of hardware mechanism for clock and trigger distribution
** Update of firmware code mechanism

== '''Hit Detector Module (ALPHA-16)''' ==

The Hit Detector firmware module handles the acquisition of the analog input signals from the anode wires and scintillators, the digital conversion of that data, and then the transfer of that data to both the DAQ and the Trigger Master. The first implementation of the hit detection is based on hit multiplicity. Later on, a more sophisticated algorithm will be implemented to determine in real time the timing and charge collected for each channel. This information will be transferred to the Trigger Master for more efficient trigger filtering.

The ADC data is acquired from both the FMC ADC32 ADCs and the onboard 16ch 14-bit ADCs using the FPGAs hardware SERDES modules. These modules de-serialize the data stream from the ADCs into a format suitable for internal analysis for hit detection, and for transfer to the MIDAS DAQ.

Once one or more hits are detected, the ALPHA-16 transmits the hit count to the ALPHA-T for a hit multiplicity test, and then waits for a trigger response to decide to discard or transmit the waveform data associated with the detected hit to the DAQ.

Currently, when a trigger is fired by the Trigger Decision module, all channels transmit their captured waveforms to the DAQ. In the future, only channels that have detected a hit will send waveforms on a trigger.

System monitoring and configuration of the Hit Detector module is handled by ESPER running on a NIOS-II soft-core processor instantiated within the FPGA. The OS used is Micrium µC/OS-II, a small real-time OS licensed by Altera for use with their NIOS-II processor. ESPER performs the remote upgrading of the Hit Detector, viewing of the captured waveforms, and diagnostic reading and writing of all firmware settings and counters via a simple JSON-based interface, or an HTML based webpage.

[[File:image25daq.png|517x318px]]

Figure 20 - Hit Detector for the Anode wire and scintillators in ALPHA-16

== '''Pad Acquisition Module (FEAM)''' ==

The pad acquisition firmware module handles the collection of the PAD analog signals captured by the four AFTER ASICs on the module. Capture occurs upon receiving a trigger signal from the Trigger Decision module. Once captured, the AFTER data is transmitted to the MIDAS DAQ over ethernet. No pad information is provided back to the Trigger Decision module.

Each of the AFTER ASICs transmits its captured analog data to a 12-bit ADC which in turn converts the analog signal into digital data and transmits that to the FPGA. The FPGA uses its internal SERDES hardware to de-serialize this data and process it. Once captured, channels that do not contain data of interest are suppressed, and the data is packaged up and sent out over UDP to the MIDAS DAQ.

In the event that the SFP module that provides ethernet connectivity fails, each PAD acquisition module is connected to one other PAD acquisition module via a secondary gigabit link. While currently unused, this link will be used in the future to support a backup link to the DAQ, in the event of a failure of the primary gigabit link.

System monitoring and configuration of the PAD acquisition module is handled by ESPER running on a NIOS-II soft-core processor instantiated within the FPGA. The OS used is Micrium µC/OS-II, a small real-time OS licensed by Altera for use with their NIOS-II processor. ESPER performs the remote upgrading of the Hit Detector, viewing of the captured waveforms, and diagnostic reading and writing of all firmware settings and counters via a simple JSON-based interface, or an HTML based webpage.

[[File:image26daq.png|490x299px]]

Figure 21 - AFTER chip WFD on the PADWINGS

== '''Trigger Master module (ALPHA-T)''' ==

The Trigger Master firmware module is to collect information from the anode wires and scintillators to make a real-time decision if the current physics event is to be recorded. That decision is fed to all the readout boards to trigger the storage of this particular event.

Initial trigger decision will be based on hit multiplicity of each of the ALPHA-16 boards. As the ALPHA-16 is acquiring the anode wire and the barrel scintillator signals, both of these 2 pieces of equipment will contribute to the trigger decision. Dedicated link from each of the ALPHA-16 (hit detector) to the Trigger module will be gathering the overall information for a final decision. Hardware trigger signal is then sent from the ALPHA-T to the CDM for distribution to all the acquisition modules to initiate the transmission of their data to the backend computer through UDP. The trigger board will compose a summary of the trigger information which will also be transferred to the backend.

The Trigger Master module contains two Mini-SAS FMCs, and one ‘communication’ FMC, that consists of a SATA, an SFP, and a Mini-SAS connector. This configuration of FMCs allows for up to twenty (20) 1G/2.5G/5G links via the Mini-SAS, in addition to a 1 Gbit/sec Ethernet connection via the SFP, and clock+trigger over the SATA.

[[File:image27daq.png|576x304px]]

Figure 22 - Trigger decision on ALPHA-T

== System Monitoring and debugging capability ==

The system monitoring is based on the ESPER protocol provided by the Electronics Development group at TRIUMF. Featuring a built-in web server, with real-time digitizer display, remote upgrade, and JSON-accessible parameters. ESPER allows for real-time diagnostics and testing to be performed on the various electronic modules using either JSON-based requests or a built-in webpage.

[[File:image28daq.png|800x400px]]

Figure 23 - ESPER Web Display. Test pulse recorded by the FEAM cards. Individual AFTER chip configuration is visible (gain change, delay).

= Safety and Hazard considerations =

There are no safety or hazard issues in FE system. All amplifiers are low-voltage and low-power circuits built with standard electronics components.

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