Daq

Links

• https://alphagdaq.triumf.ca -- midas daq page
• https://daq.triumf.ca/elog-alphag/alphag/ -- elog
• https://daqstore.triumf.ca/AgWiki/index.php/Main_Page -- this wiki
• https://bitbucket.org/teamalphag/profile/repositories -- git repository on bitbucket
• https://edev-group.triumf.ca/fw/exp/alphag -- git repository on edev gitlab

Hardware manuals

• trigger board - alphat -- trigger ALPHA-T (GRIF-C) manual
• CDM - https://daq.triumf.ca/DaqWiki/index.php/VME-CDM -- clock VME-CDM manual
• ADC - https://daq.triumf.ca/DaqWiki/index.php/VME-GRIF-ADC16-Rev1 -- GRIF-16 ADC manual
• PWB - pwb -- TPC Pad Wing Board manual

MIDAS frontends

UDP

feudp receives udp packets from the ADC and PWB boards. For each udp packet 1 midas event is created, with 1 data bank containing the udp data. Events are sent into the MIDAS event buffer BUFUDP. The names of the data banks are assigned in ODB /eq/feudp/settings.

{ADC,PWB} --> 1gige --> switch --> 10gige --> alphagdaq --> feudp -> BUFUDP

CTRL

fectrl controls all the ADC, PWB and trigger boards. It provides run start and stop sequencing, runs the event synchronization sequence at the begin of the run, and records slow controls data (temperatures, voltages, etc).

fectrl receives UDP data packets from the trigger board and sends them to the MIDAS event buffer BUFUDP.

fectrl receives commands from the control web pages (for ADC, PWB and trigger) to reboot, initialize, etc the boards.

fectrl configures the event builder via odb /eq/fectrl/evbconfig.

ADC <-> http esper <-> fectrl -> slow control data into midas history

PWB <-> http esper <-> fectrl -> slow control data into midas history

TRG <-> udp comm <-> fectrl -> BUFUDP, slow control and counters into midas history

fectrl <-> midas rpc <-> mhttpd <-> json rpc <-> control web pages for ADC, PWB and trigger

EVB

feevb receives udp packet data from the MIDAS event buffer BUFUDP, inspects the packet timestamps and collects the data with matching timestamps into physics events. feevb has provisions to do data suppression, reduction and compression in addition to the data reduction done in the ADC and PWB firmware.

feevb event synchronization relies on the event synchronization sequence done by fectrl when a run is started.

{ADC, PWB, TRG} -> BUFUDP -> feevb -> SYSTEM -> mlogger -> compression -> disk storage

ZZZ

ZZZ