User contributions for Olchansk
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7 July 2022
- 18:3518:35, 7 July 2022 diff hist +103 TRG →conf_trig_enable bits
- 18:3218:32, 7 July 2022 diff hist +144 TRG →conf_coinc_control bits
- 18:3118:31, 7 July 2022 diff hist +123 TRG →conf_bsc_control bits
- 18:2718:27, 7 July 2022 diff hist +198 TRG →Register addresses
- 18:2018:20, 7 July 2022 diff hist +293 TRG →Register addresses
- 18:1718:17, 7 July 2022 diff hist −2,343 TRG →ALPHA-g trigger functions
5 July 2022
- 15:0315:03, 5 July 2022 diff hist +36 TRG →Example UDP packets
- 15:0215:02, 5 July 2022 diff hist +71 Chronobox →FIFO data format
10 June 2022
- 14:4114:41, 10 June 2022 diff hist −5 TRG →Register addresses
6 June 2022
- 16:4416:44, 6 June 2022 diff hist +1 Daq →/Equipment/CTRL/Settings/TRG - trigger settings
- 15:0315:03, 6 June 2022 diff hist +468 Daq →/Equipment/CTRL/Settings/TRG - trigger settings
- 14:3814:38, 6 June 2022 diff hist +44 Daq →/Equipment/CTRL/Settings/TRG - trigger settings
- 14:3614:36, 6 June 2022 diff hist +255 Daq →/Equipment/CTRL/Settings/TRG - trigger settings
2 June 2022
- 13:5713:57, 2 June 2022 diff hist +478 Daq →/Equipment/CTRL/Variables
- 13:5313:53, 2 June 2022 diff hist +38 Daq →/Equipment/CTRL/Settings/TDC - TDC settings
- 11:5911:59, 2 June 2022 diff hist −9 RTM No edit summary current
- 11:5811:58, 2 June 2022 diff hist +52 ASD No edit summary current
31 May 2022
- 16:2016:20, 31 May 2022 diff hist +47 RTM →RTM
- 16:1916:19, 31 May 2022 diff hist 0 N File:TDE2394 BV Rear Transition Module RevA Schematic.PDF No edit summary current
- 16:1116:11, 31 May 2022 diff hist +132 RTM →RTM
- 16:0916:09, 31 May 2022 diff hist +220 N RTM Created page with "= RTM = VME rear transition board: * blue cable from ASD comes in * ADC and TDC signals are split * ADC signal through relays send to GRIF-16 rear inputs * TDC signal send t..."
- 16:0816:08, 31 May 2022 diff hist +42 Daq →Hardware manuals
20 April 2022
- 15:4915:49, 20 April 2022 diff hist +252 Chronobox →FIFO data format
- 15:4515:45, 20 April 2022 diff hist +143 Chronobox →FIFO data format
- 15:4215:42, 20 April 2022 diff hist +256 Chronobox →Errata
- 15:4015:40, 20 April 2022 diff hist +62 Chronobox →TODO
- 15:4015:40, 20 April 2022 diff hist +73 Chronobox →Firmware revisions
19 April 2022
- 15:2415:24, 19 April 2022 diff hist +51 Chronobox →TODO
8 April 2022
- 14:1314:13, 8 April 2022 diff hist 0 Chronobox →Timestamps (TSC)
- 14:1314:13, 8 April 2022 diff hist 0 Chronobox →Firmware 0x61832695
- 14:1214:12, 8 April 2022 diff hist 0 Chronobox →Firmware 0x624e0e04
- 14:1214:12, 8 April 2022 diff hist +87 Chronobox →Firmware revisions
6 April 2022
- 15:2515:25, 6 April 2022 diff hist +228 Chronobox →Timestamps (TSC)
- 14:4314:43, 6 April 2022 diff hist +181 Chronobox →Firmware 0x61832695
- 12:0712:07, 6 April 2022 diff hist +99 Chronobox →Output data fifo
- 12:0612:06, 6 April 2022 diff hist +29 Chronobox →Timestamps (TSC)
- 12:0612:06, 6 April 2022 diff hist +29 Chronobox →Scalers
- 11:2911:29, 6 April 2022 diff hist +112 Chronobox →Timestamps (TSC)
- 11:2211:22, 6 April 2022 diff hist +125 Chronobox →Timestamps (TSC)
- 11:1811:18, 6 April 2022 diff hist +5 Chronobox →Scalers
- 11:0211:02, 6 April 2022 diff hist +142 Chronobox →Scalers
- 10:5310:53, 6 April 2022 diff hist +57 Chronobox →Scalers
- 10:4910:49, 6 April 2022 diff hist +30 Chronobox →Scalers
11 February 2022
- 12:1112:11, 11 February 2022 diff hist +35 PWB →TODO
- 11:4711:47, 11 February 2022 diff hist +69 TRG →TODO
20 November 2021
- 18:2318:23, 20 November 2021 diff hist +97 Daq →Links
- 18:1118:11, 20 November 2021 diff hist +72 Daq →Links
- 15:0715:07, 20 November 2021 diff hist +12 TRG →UDP data format
- 15:0715:07, 20 November 2021 diff hist +12 TRG →conf_trig_enable bits
- 15:0615:06, 20 November 2021 diff hist +6 TRG →additional registers