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		<title>PcHardware</title>
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		<updated>2023-09-18T23:37:34Z</updated>

		<summary type="html">&lt;p&gt;Pierre: /* Version 2022-Dec AMD DDR5 PC */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;== DAQ PC Configurations ==&lt;br /&gt;
&lt;br /&gt;
=== Buying from newegg.ca ===&lt;br /&gt;
&lt;br /&gt;
* select &amp;quot;shipped by newegg&amp;quot;&lt;br /&gt;
* select &amp;quot;ship from country: Canada&amp;quot;&lt;br /&gt;
&lt;br /&gt;
=== Standard components ===&lt;br /&gt;
&lt;br /&gt;
==== Fans ====&lt;br /&gt;
&lt;br /&gt;
* long life time (150&#039;000 hrs) 4pin PWM 120mm fan:&lt;br /&gt;
** http://www.ncix.com/products/?sku=24331&amp;amp;vpn=ACF12PWM&amp;amp;manufacture=Arctic%20Cooling&lt;br /&gt;
** http://www.ncix.com/detail/noctua-nf-s12a-pwm-120mm-ultra-7e-79672.htm&lt;br /&gt;
* long life time (150&#039;000 hrs) 3pin (non-PWM) 120mm fan:&lt;br /&gt;
** http://www.ncix.ca/products/?sku=35020&amp;amp;vpn=D1225C12B5AP-15&amp;amp;manufacture=Scythe&amp;amp;promoid=1268&lt;br /&gt;
** http://www.ncix.com/detail/noctua-nf-s12a-flx-120mm-ultra-b4-79670.htm&lt;br /&gt;
&lt;br /&gt;
==== Power supplies ====&lt;br /&gt;
&lt;br /&gt;
Power supply requirements:&lt;br /&gt;
* 120mm cooling fan (longer life, better air flow vs small fans)&lt;br /&gt;
* ActivePFC (no 110/220V switch, high power factor is required for use with UPSes)&lt;br /&gt;
* 4 or more SATA power connectors&lt;br /&gt;
&lt;br /&gt;
==== SSD ====&lt;br /&gt;
&lt;br /&gt;
* M.2 PCIe SSD not recommended, if there is a glitch, PCIe bus hangs, computer stops without error messages, impossible to debug. also not clear how to recover data from this type of SSD if mobo dies.&lt;br /&gt;
* SATA: WD blue 250GB, 500GB, 1TB, 2TB &lt;br /&gt;
* M.2 SATA: WD blue&lt;br /&gt;
* (obsolete) SATA: Kingston V200, V200+, V300 - 60GB, 120GB&lt;br /&gt;
* (obsolete) M.2: (proposed) Kingston SSDNow M.2 2280 120GB http://www.newegg.ca/Product/Product.aspx?Item=N82E16820104482&lt;br /&gt;
&lt;br /&gt;
=== Version 2022-Dec AMD DDR5 PC ===&lt;br /&gt;
&lt;br /&gt;
(in progress. CPU not available at this moment!)&lt;br /&gt;
&lt;br /&gt;
Notes:&lt;br /&gt;
* use B560/X670 chipset, no separate chipset cooling fan&lt;br /&gt;
* count available PCIe slots, usually only 1 x16 slots, up to 2 x4 slots (look like x16 slots) and a few x1 slots (short ones)&lt;br /&gt;
* DDR5 includes on-chip ECC&lt;br /&gt;
* DDR5 ECC memory has additional lanes for on-CPU ECC. CPU and mobo must say &amp;quot;ECC supported&amp;quot;&lt;br /&gt;
* use 1.1V DDR5-4800-40 RAM&lt;br /&gt;
* use 1.2V DDR5-5200-40 RAM&lt;br /&gt;
* use 1.25V DDR5-5200-36 RAM (fastest)&lt;br /&gt;
&lt;br /&gt;
* $450 AMD 7700 8-Core 3.8/5.3 GHz 65W https://www.newegg.ca/amd-ryzen-7-7700/p/N82E16819113786?Item=N82E16819113786&lt;br /&gt;
* (not this one) $350 AMD 7600X 6-core 4.7/5.3 GHz 105W https://www.newegg.ca/amd-ryzen-5-7600x-ryzen-5-7000-series/p/N82E16819113770?Item=N82E16819113770&lt;br /&gt;
* $300 ASUS Prime B560-PLUS (ECC, PCIe x8,x4,x1,x1) https://www.newegg.ca/asus-prime-b650-plus/p/N82E16813119607?Item=N82E16813119607&lt;br /&gt;
* $400 2x32GB https://www.newegg.ca/g-skill-64gb/p/N82E16820374440?Item=N82E16820374440&lt;br /&gt;
* $65 500W P.S. https://www.newegg.ca/thermaltake-smart-500w-ps-spd-0500npcwus-w/p/N82E16817153233?Item=N82E16817153233&lt;br /&gt;
&lt;br /&gt;
* $90 2x WD Blue 250GB SA5 SSD https://www.newegg.ca/western-digital-250gb-blue-sa510/p/N82E16820250227&lt;br /&gt;
&lt;br /&gt;
=== Version 2022-Aug AMD reduced cost PC ===&lt;br /&gt;
&lt;br /&gt;
Differences from &amp;quot;big PC&amp;quot;:&lt;br /&gt;
* cheapest 5000-series &amp;quot;G&amp;quot; CPU&lt;br /&gt;
* non-ECC memory&lt;br /&gt;
* small size motherboard&lt;br /&gt;
&lt;br /&gt;
Notes:&lt;br /&gt;
* use B550 chipset (X570 runs hot, requires short-life small cooling fan. avoid)&lt;br /&gt;
* use AMD &amp;quot;5000X&amp;quot; CPUs for ECC memory support (&amp;quot;5000G&amp;quot; CPUs are missing Linux ECC drivers)&lt;br /&gt;
* use 1.2V DDR4 SDRAM. current size is 2x 32GB (dual-channel memory)&lt;br /&gt;
&lt;br /&gt;
Parts:&lt;br /&gt;
* $250 https://www.newegg.ca/amd-ryzen-5-5600g-ryzen-5-5000-g-series/p/N82E16819113683&lt;br /&gt;
* $300 https://www.newegg.ca/team-64gb-288-pin-ddr4-sdram/p/N82E16820331582?Item=N82E16820331582&lt;br /&gt;
* $210 https://www.newegg.ca/asus-tuf-gaming-b550m-plus-wifi-ii/p/N82E16813119569?Item=N82E16813119569&lt;br /&gt;
* 2x$55 https://www.newegg.ca/western-digital-250gb-blue-sa510/p/N82E16820250227?Item=N82E16820250227&lt;br /&gt;
* $70 https://www.newegg.ca/rosewill-arc-series-arc-550-continuous-550w-40-degree-c/p/N82E16817182297?Item=N82E16817182297&lt;br /&gt;
* $0 chassis (reuse existing)&lt;br /&gt;
* total: 250+300+210+2*55+70 = 940&lt;br /&gt;
&lt;br /&gt;
=== Version 2021-Sep AMD big PC ===&lt;br /&gt;
&lt;br /&gt;
* use B550 chipset (X570 runs hot, requires short-life small cooling fan. avoid)&lt;br /&gt;
* use AMD &amp;quot;5000X&amp;quot; CPUs for ECC memory support (&amp;quot;5000G&amp;quot; CPUs are missing Linux ECC drivers)&lt;br /&gt;
&lt;br /&gt;
* https://www.newegg.ca/amd-ryzen-7-5700g-ryzen-7-5000-g-series/p/N82E16819113682&lt;br /&gt;
* https://www.newegg.ca/asus-rog-strix-b550-xe-gaming-wifi/p/N82E16813119363&lt;br /&gt;
* https://www.newegg.ca/p/1X5-003Z-018J2&lt;br /&gt;
* https://www.newegg.ca/western-digital-blue-250gb/p/N82E16820250086&lt;br /&gt;
* https://www.newegg.ca/antec-vp-plus-series-vp550-plus-550w/p/N82E16817371113?Item=N82E16817371113&lt;br /&gt;
&lt;br /&gt;
* AMD Ryzen 7 5700G 8-Core Processor with graphics&lt;br /&gt;
* mobo ASUS ROG STRIX B550-XE GAMING&lt;br /&gt;
* 2x32GB DDR4-3200 RAM (64GB total with 2 empty slots to add more later)&lt;br /&gt;
* ECC memory is recommended, NEMIX RAM always available on newegg.ca&lt;br /&gt;
* dual SATA SSD for OS (Ubuntu LTS 20.04, install on ZFS)&lt;br /&gt;
* dual HDDs as needed&lt;br /&gt;
&lt;br /&gt;
=== Version 2021-Jan AMD big PC ===&lt;br /&gt;
&lt;br /&gt;
* AMD Ryzen 7 3700X 8-Core Processor&lt;br /&gt;
* mobo ASUS ROG STRIX B550-E GAMING&lt;br /&gt;
* 2x32GB DDR4-3200 RAM (64GB total with 2 empty slots to add more later)&lt;br /&gt;
* ECC memory is recommended, but availability and price not clear&lt;br /&gt;
* dual SATA SSD for OS (Ubuntu LTS 20.04)&lt;br /&gt;
* dual HDDs as needed&lt;br /&gt;
&lt;br /&gt;
=== Version 2019-July-05 Reduced Cost PC ===&lt;br /&gt;
&lt;br /&gt;
Purchased for MUSR DAQ refresh. $900 per machine.&lt;br /&gt;
&lt;br /&gt;
* mobo: ASUS TUF Z390M-Pro&lt;br /&gt;
* CPU: Intel i5-9400 2.9GHz 65W&lt;br /&gt;
* RAM: DDR4-3200&lt;br /&gt;
* P.S.: Thermaltake 500W&lt;br /&gt;
* Case: Antec VSK3000 Elite MicroATX minitower&lt;br /&gt;
&lt;br /&gt;
=== Version 2018-June-29 Intel Socket 1151 ===&lt;br /&gt;
&lt;br /&gt;
Recently bought three new DAQ computers from ELCO, with following MOBO and CPU&lt;br /&gt;
&lt;br /&gt;
* MOBO: ASUS TUF Z370 Plus Gaming LGA 1151 ATX&lt;br /&gt;
* CPU: Intel Core i7-8700 LGA1151 (3.20GHz, L3:12M, Hex Core, TDP: 65W)&lt;br /&gt;
* RAM: DDR4-2667&lt;br /&gt;
&lt;br /&gt;
Full quote available [https://www.triumf.info/wiki/DAQwiki/index.php/Image:Quote_3078.pdf here].&lt;br /&gt;
&lt;br /&gt;
=== Version ??? Intel Socket 1151 ===&lt;br /&gt;
&lt;br /&gt;
* Mobo: Z270&lt;br /&gt;
* Mobo: Z170&lt;br /&gt;
* RAM: DDR4&lt;br /&gt;
&lt;br /&gt;
=== Version 2017-01-17 Reduced Cost PC ===&lt;br /&gt;
&lt;br /&gt;
$700 per machine&lt;br /&gt;
&lt;br /&gt;
* CPU: Intel i3-7100 CPU @ 3.90GHz&lt;br /&gt;
* Mobo: ASUS H110M-A/M.2&lt;br /&gt;
* RAM: single 16GB DIMM DDR4-2133&lt;br /&gt;
* SSD: Kingston 120GB SATA M.2&lt;br /&gt;
* P.S.: Thermaltake TR2 500W&lt;br /&gt;
* Chassis: Antec VSK3000E-U3 minitower&lt;br /&gt;
&lt;br /&gt;
=== Version 2015-NOV-17 Intel Socket 1151 ===&lt;br /&gt;
&lt;br /&gt;
* this is the new standard DAQ PC replacing the socket 1150 DAQ PC. Improvement: max of 64GB RAM (vs 32GB on Z87/Z97), max 2 monitors (vs 3 on Z87/Z97)&lt;br /&gt;
* price: mobo($400) + CPU($300) + RAM ($600 for 64GB) + SSD ($75 for 120GB) + storage ($xxx for dual mirrored 6TB) = $1500 + storage.&lt;br /&gt;
* Mobo: ASUS Z170-DELUXE CAD$400 http://www.newegg.ca/Product/Product.aspx?Item=N82E16813132568 https://www.asus.com/ca-en/Motherboards/Z170-DELUXE/&lt;br /&gt;
* CPU: Intel Core i5-6600 6M Quad-Core 3.3 GHz (no ECC) http://www.newegg.ca/Product/Product.aspx?Item=N82E16819117562 http://ark.intel.com/products/88188/Intel-Core-i5-6600-Processor-6M-Cache-up-to-3_90-GHz&lt;br /&gt;
* Case1: Antec Sonata III 500: http://www.ncix.com/products/?sku=24294&amp;amp;vpn=SONATA%20III%20500&amp;amp;manufacture=Antec&amp;amp;promoid=1285&lt;br /&gt;
* Case2: Antec Sonata Proto (no power supply) http://www.ncix.ca/products/?sku=52550&amp;amp;vpn=SONATA%20PROTO&amp;amp;manufacture=Antec, add high power power supply from list above.&lt;br /&gt;
* SSD storage: KINGSTON SM2280S3120G http://www.newegg.ca/Product/Product.aspx?Item=N82E16820104482&amp;amp;cm_re=KINGSTON_SM2280S3120G-_-20-104-482-_-Product&lt;br /&gt;
* SSD storage: Kingston SM2280S3G2/120G M.2 2280 http://www.newegg.ca/Product/Product.aspx?Item=2BN-001M-00010&lt;br /&gt;
* Storage: 2x 6TB in fully mirrored (RAID1) configuration: (use cheapest available NAS 6TB disks, i.e. WD &amp;quot;red&amp;quot; or &amp;quot;purple&amp;quot;)&lt;br /&gt;
* RAM: 32GB: use cheapest kit of 2x16GB DDR4 - CAD$300 - http://www.newegg.ca/Product/Product.aspx?Item=N82E16820231965&lt;br /&gt;
* RAM: 64GB: use cheapest kit of 4x16GB DDR4 - CAD$600 - http://www.newegg.ca/Product/Product.aspx?Item=N82E16820231968&lt;br /&gt;
* Cooling fans: replace stock short-life-time fans with new long-life-time fans, see list above.&lt;br /&gt;
* Instructions for mounting cooling fans: remove stock short-life-time fans, mount replacement fans for air flow from back to front of the case: 1 rear case fan, 1 front mounted fan blowing on the hard drives. Remove front air filter, duct-tape shut all rear, side and bottom air holes - air flow should be: rear fan pushes air into computer, front fan pushes air into hard disk enclosure, out of computer through the front of the case where the air filter used to be.&lt;br /&gt;
&lt;br /&gt;
=== Version 2014-DEC-8 Intel Socket 1150 ===&lt;br /&gt;
&lt;br /&gt;
* this is the new standard DAQ PC replacing the socket 2011 DAQ PC. Improvement: no need for external video card - this permits mounting in 2U and 3U chassis, on board support for 3 large LCD monitors, use latest Intel CPUs. Drawback: 32GB RAM max instead of 64GB RAM, dual-channel ram instead of quad-channel RAM.&lt;br /&gt;
* price: $840 + RAM ($370 for 32GB) + SSD ($75 for 120GB) + storage ($400 for dual mirrored 4TB) = $1700.&lt;br /&gt;
* Mobo: ASUS Z97 WS http://www.asus.com/ca-en/Motherboards/Z97WS http://www.newegg.ca/Product/Product.aspx?Item=N82E16813132126&lt;br /&gt;
* CPU: Intel i7-4790K http://ark.intel.com/products/80807 http://www.newegg.ca/Product/Product.aspx?Item=N82E16819117369&lt;br /&gt;
* Case1: Antec Sonata III 500: http://www.ncix.com/products/?sku=24294&amp;amp;vpn=SONATA%20III%20500&amp;amp;manufacture=Antec&amp;amp;promoid=1285&lt;br /&gt;
* Case2: Antec Sonata Proto (no power supply) http://www.ncix.ca/products/?sku=52550&amp;amp;vpn=SONATA%20PROTO&amp;amp;manufacture=Antec, add high power power supply from list above.&lt;br /&gt;
* SSD storage: use SSD from list above. (Possible to use &amp;quot;M.2 Socket 3 with M Key&amp;quot; SSD, see mobo manual)&lt;br /&gt;
* Storage: 2x 4TB in fully mirrored (RAID1) configuration: (use cheapest available 4TB disks)&lt;br /&gt;
* RAM: use cheapest (32GB) kit of 4x8GB DDR3-1600 RAM: http://www.ncix.ca/products/?sku=65663&amp;amp;vpn=F3-12800CL10Q-32GBZL&amp;amp;manufacture=G%2ESkill http://www.ncix.com/detail/g-skill-ripjawsz-f3-12800cl10q-32gbzl-32gb-4x8gb-dc-65663.htm&lt;br /&gt;
* Video card: none, using Intel on-CPU video&lt;br /&gt;
* Cooling fans: (replace stock short-life-time fans) - 2 per PC - http://www.ncix.com/detail/noctua-nf-s12a-flx-120mm-ultra-b4-79670.htm&lt;br /&gt;
* Instructions for mounting cooling fans: remove stock short-life-time fans, mount replacement fans for air flow from back to front of the case: 1 rear case fan, 1 front mounted fan blowing on the hard drives. Remove front air filter, duct-tape shut all rear, side and bottom air holes - air flow should be: rear fan pushes air into computer, front fan pushes air into hard disk enclosure, out of computer through the front of the case where the air filter used to be.&lt;br /&gt;
* (to be updated) Cooling fans note: ASUS Z87 WS motherboard requires use of non-PWM fans. The 4-pin fan headers do not provide PWM fan control - see mobo manual - pwm pin is hardwired to +5V. Only the 4-pin fan header CPU_OPT has PWM control - connect a PWM fan (4-pin connector) - but it will run at same speed as the main CPU fan.&lt;br /&gt;
&lt;br /&gt;
=== Version 2014-May-07 Reduced cost PC ===&lt;br /&gt;
&lt;br /&gt;
* this replaces the specs for the E-350/E-450 reduced cost PC&lt;br /&gt;
* total price around $235 + RAM ($190) + SSD ($75) = $500&lt;br /&gt;
* Mobo:  ASUS AM1M-A - http://www.asus.com/Motherboards/AM1MA http://www.ncix.com/detail/asus-am1m-a-matx-am1-ddr3-47-96120.htm http://www.newegg.ca/Product/Product.aspx?Item=9SIA7RD2WU4767&lt;br /&gt;
* CPU: AMD Athlon 5350 2GHz - http://www.ncix.com/detail/amd-athlon-5350-am1-2-0ghz-ef-95079-1308.htm http://www.newegg.ca/Product/Product.aspx?Item=N82E16819113364&lt;br /&gt;
* RAM: cheapest DDR3-1600 2x8GB or 4x8GB kit - http://www.ncix.com/detail/g-skill-ripjawsz-f3-12800cl10q-32gbzl-32gb-4x8gb-dc-65663.htm&lt;br /&gt;
* Case: MicroATX with provision for side-mounted 120mm fan - http://www.ncix.com/detail/fractal-design-core-1000-matx-54-81159.htm http://www.newegg.ca/Product/Product.aspx?Item=N82E16811352032&lt;br /&gt;
* Power supply: Cheapest with 120mm fan and active PFC - http://www.ncix.com/products/?sku=30144&amp;amp;vpn=SS-350ET&amp;amp;manufacture=Seasonic%20Electronics&lt;br /&gt;
* Cooling fan: extra-long-life 120mm PWM fan - http://www.ncix.com/detail/noctua-nf-s12a-pwm-120mm-ultra-7e-79672.htm&lt;br /&gt;
* Storage: Kingston 120GB SSD - http://www.ncix.com/detail/kingston-ssdnow-v300-120gb-2-5in-8c-78078-1078.htm&lt;br /&gt;
&lt;br /&gt;
=== Version 2014-MAY-8 Intel Socket 1150 ===&lt;br /&gt;
&lt;br /&gt;
* this is the new standard DAQ PC replacing the socket 2011 DAQ PC. Improvement: no need for external video card - this permits mounting in 2U and 3U chassis, on board support for 3 large LCD monitors, use latest Intel CPUs. Drawback: 32GB RAM max instead of 64GB RAM, dual-channel ram instead of quad-channel RAM.&lt;br /&gt;
* price: $840 + RAM ($370 for 32GB) + SSD ($75 for 120GB) + storage ($400 for dual mirrored 4TB) = $1700.&lt;br /&gt;
* Mobo: ASUS Z87 WS http://www.asus.com/Motherboards/Z87WS/#specifications http://www.ncix.com/detail/asus-motherboard-z87-ws-core-i7-i5-i3-ca-2222138415.htm&lt;br /&gt;
* CPU: Intel i7-4770 http://ark.intel.com/products/75122/Intel-Core-i7-4770-Processor-8M-Cache-up-to-3_90-GHz http://products.ncix.com/detail/intel-core-i7-4770-quad-core-3-4ghz-processor-lga1150-haswell-8mb-cache-retail-86-81326.htm&lt;br /&gt;
* Case1: Antec Sonata III 500: http://www.ncix.com/products/?sku=24294&amp;amp;vpn=SONATA%20III%20500&amp;amp;manufacture=Antec&amp;amp;promoid=1285&lt;br /&gt;
* Case2: Antec Sonata Proto (no power supply) http://www.ncix.ca/products/?sku=52550&amp;amp;vpn=SONATA%20PROTO&amp;amp;manufacture=Antec, add high power power supply from list above.&lt;br /&gt;
* SSD storage: use SSD from list above. Or use mSATA SSD in the mSATA slot (remember to move the jumper switch per mobo manual).&lt;br /&gt;
* Storage: 2x 4TB in fully mirrored (RAID1) configuration: (use cheapest available 4TB disks)&lt;br /&gt;
* RAM: 1 (32GB) kit of 4x8GB DDR3-1600 RAM : http://www.ncix.ca/products/?sku=65663&amp;amp;vpn=F3-12800CL10Q-32GBZL&amp;amp;manufacture=G%2ESkill http://www.ncix.com/detail/g-skill-ripjawsz-f3-12800cl10q-32gbzl-32gb-4x8gb-dc-65663.htm&lt;br /&gt;
* Video card: none, using Intel on-CPU video&lt;br /&gt;
* Cooling fans: (replace stock short-life-time fans) - 2 per PC - http://www.ncix.com/detail/noctua-nf-s12a-flx-120mm-ultra-b4-79670.htm&lt;br /&gt;
* Instructions for mounting cooling fans: remove stock short-life-time fans, mount replacement fans for air flow from back to front of the case: 1 rear case fan, 1 front mounted fan blowing on the hard drives. Remove front air filter, duct-tape shut all rear, side and bottom air holes - air flow should be: rear fan pushes air into computer, front fan pushes air into hard disk enclosure, out of computer through the front of the case where the air filter used to be.&lt;br /&gt;
* Cooling fans note: ASUS Z87 WS motherboard requires use of non-PWM fans. The 4-pin fan headers do not provide PWM fan control - see mobo manual - pwm pin is hardwired to +5V. Only the 4-pin fan header CPU_OPT has PWM control - connect a PWM fan (4-pin connector) - but it will run at same speed as the main CPU fan.&lt;br /&gt;
&lt;br /&gt;
=== Version 2014-MAY-8 Intel Socket 2011 ===&lt;br /&gt;
&lt;br /&gt;
* High end machine with 64 GB RAM max, total price: $1100 + RAM ($370/32GB) + storage ($400 for 2x4TB disks) = $1900&lt;br /&gt;
* Mobo: ASUS P9X79 WS (dual-Intel GigE): http://www.asus.com/ca-en/Motherboards/P9X79_WS/#specifications http://ca.asus.com/Motherboards/Intel_Socket_2011/P9X79_WS/#specifications http://www.ncix.ca/products/?sku=66066&amp;amp;vpn=P9X79%20WS&amp;amp;manufacture=ASUS&amp;amp;promoid=1259 &lt;br /&gt;
* CPU: Intel i7-4820k: http://products.ncix.com/detail/intel-core-i7-4820k-quad-core-3-7ghz-3-9ghz-turbo-10mb-hyperthreading-lga2011-processor-no-hsf-e2-89509-1019.htm&lt;br /&gt;
* CPU cooler: Cooler Master Hyper 212 Evo (very high profile, fits the Sonata case) http://www.ncix.ca/products/?sku=64385&lt;br /&gt;
* CPU cooler for rackmounted use: (NOTE: this cooler is very low profile and obstructs some memory slots) http://www.ncix.ca/products/?sku=67626&amp;amp;vpn=SCBSK-2100&amp;amp;manufacture=Scythe&lt;br /&gt;
* Case: Antec Sonata III 500: http://www.ncix.com/products/?sku=24294&amp;amp;vpn=SONATA%20III%20500&amp;amp;manufacture=Antec&amp;amp;promoid=1285&lt;br /&gt;
* SSD storage (system disk only, no data storage): use cheapest available Kingston V100 or V200 SSD size 32GB or bigger : http://www.ncix.ca/products/?sku=65084&amp;amp;vpn=SV100S2%2F32G&amp;amp;manufacture=Kingston http://www.ncix.ca/products/?sku=67531&amp;amp;vpn=SVP200S3%2F60G&amp;amp;manufacture=Kingston&amp;amp;promoid=1230&lt;br /&gt;
* Storage: 2x 3TB in fully mirrored (RAID1) configuration: (use cheapest available 3TB disks) http://www.ncix.ca/products/?sku=62178&amp;amp;vpn=WD30EZRX&amp;amp;manufacture=Western%20Digital%20WD&lt;br /&gt;
* Storage: 2x 4TB in fully mirrored (RAID1) configuration: (use cheapest available 4TB disks): http://www.ncix.com/detail/western-digital-green-4tb-sata3-b3-90788-1078.htm&lt;br /&gt;
* RAM: 1 (32GB) or 2 (64GB) kits of 4x8GB DDR3-1600 RAM : http://www.ncix.ca/products/?sku=65663&amp;amp;vpn=F3-12800CL10Q-32GBZL&amp;amp;manufacture=G%2ESkill&lt;br /&gt;
* Video card: PCIe VGA+DVI+HDMI fan-less: http://products.ncix.com/detail/asus-geforce-gt-610-fanless-810mhz-2gb-1200mhz-gddr3-dvi-hdmi-vga-pci-e-video-card-73-75560.htm&lt;br /&gt;
* replacement for stock cooling fans, 2 per computer (1 rear case fan, 1 front disk drive fan, mount for air flow back to front of computer - rear fan pushes air into computer, front fan pushes air into hard disk enclosure, out of computer; remove stock Sonata3 fan, remove front air filter, duck-tape clkosed all rear and side case openings - except for rear fan intake and front fan exhaust through front panel louvers) : for fans, use PWM or non-PWM fans from list above.&lt;br /&gt;
&lt;br /&gt;
=== Version 2012-OCT-4 AMD-E450 reduced cost PC (PRELIMINARY) ===&lt;br /&gt;
&lt;br /&gt;
* mobo+cpu combo: ASUS E45M1-M PRO 1.6GHz dual core: http://www.ncix.com/products/?sku=76096&amp;amp;vpn=E45M1-M%20PRO&amp;amp;manufacture=ASUS, http://www.newegg.ca/Product/Product.aspx?Item=N82E16813131875&lt;br /&gt;
* case: MicroATX mini tower, no ATX P.S.: http://www.newegg.ca/Product/Product.aspx?Item=N82E16811352009, http://www.ncix.com/products/?sku=58341&amp;amp;vpn=FD-CA-CORE-1000-BL&amp;amp;manufacture=Fractal%20Design&lt;br /&gt;
* power supply: low power power supply from list above&lt;br /&gt;
* ram: use single 4GB DDR3-1333 memory module (buy cheapest available)&lt;br /&gt;
* cooling fan: use 120mm 4pin PWM fan from list above&lt;br /&gt;
* boot disk: (USB Flash) Patriot RageXT 16GB USB: http://www.ncix.com/products/?sku=54556&amp;amp;vpn=PEF16GRUSB&amp;amp;manufacture=Patriot&amp;amp;promoid=1370, http://www.ncix.com/products/?sku=111127636&amp;amp;vpn=PEF16GRUSB&amp;amp;manufacture=Patriot&lt;br /&gt;
* boot disk: (SSD) use SSD from list above&lt;br /&gt;
&lt;br /&gt;
=== Version 2011-SEP-05 AMD-E350 reduced cost PC ===&lt;br /&gt;
&lt;br /&gt;
* mobo+cpu combo: ASUS E35M1-M PRO 1.6GHz dual core: http://www.ncix.com/products/?sku=59256&amp;amp;vpn=E35M1-M%20PRO&amp;amp;manufacture=ASUS&lt;br /&gt;
* case: MicroATX mini tower, no ATX P.S.: http://www.newegg.ca/Product/Product.aspx?Item=N82E16811352009, http://www.ncix.com/products/?sku=58341&amp;amp;vpn=FD-CA-CORE-1000-BL&amp;amp;manufacture=Fractal%20Design&lt;br /&gt;
* power supply: http://www.ncix.com/products/?sku=30144&amp;amp;vpn=SS-350ET&amp;amp;manufacture=Seasonic%20Electronics&lt;br /&gt;
* ram: use single 4GB DDR3-1333 memory module (buy cheapest available)&lt;br /&gt;
* cooling fan (use 120mm 4pin PWM fan): http://www.ncix.com/products/?sku=24331&amp;amp;vpn=ACF12PWM&amp;amp;manufacture=Arctic%20Cooling&lt;br /&gt;
* boot disk: Patriot RageXT 16GB USB: http://www.ncix.com/products/?sku=54556&amp;amp;vpn=PEF16GRUSB&amp;amp;manufacture=Patriot&amp;amp;promoid=1370&lt;br /&gt;
&lt;br /&gt;
=== Version 2011-OCT-31 Intel Socket 1366 ===&lt;br /&gt;
&lt;br /&gt;
* Mobo: ASUS P6X58-E WS (NOTE: only PCIe slots - no PCI slots at all!!!): http://www.ncix.ca/products/?sku=2222110300&amp;amp;vpn=P6X58-E%20WS&amp;amp;manufacture=ASUS%20TeK also http://www.newegg.ca/Product/Product.aspx?Item=N82E16813131715&lt;br /&gt;
* CPU: Intel i7-960: http://www.ncix.com/products/?sku=51240&amp;amp;vpn=BX80601960&amp;amp;manufacture=Intel&lt;br /&gt;
* Case: Antec Sonata III: http://www.ncix.com/products/?sku=24294&amp;amp;vpn=SONATA%20III%20500&amp;amp;manufacture=Antec&amp;amp;promoid=1285&lt;br /&gt;
* Hard drive: 2x 2TB in fully mirrored (RAID1) configuration: http://www.ncix.com/products/?sku=49591&amp;amp;vpn=WD20EARS&amp;amp;manufacture=Western%20Digital%20WD&amp;amp;promoid=1285&lt;br /&gt;
* RAM: 1 or 2 kits of 3x4GB=12GB: http://www.ncix.com/products/?sku=55545&amp;amp;vpn=998770&amp;amp;manufacture=Mushkin%20Enhanced&lt;br /&gt;
* Video card: PCIe VGA+DVI+HDMI MSI GeForce 210 (silent, no fan): http://www.ncix.com/products/?sku=57604&amp;amp;vpn=N210-MD512D3H%2FLP&amp;amp;manufacture=MSI%2FMicroStar&lt;br /&gt;
* enhanced cooling fans, 2 per computer: (ball bearing 120mm high CFM air flow fan): 1 rear case fan, 1 front disk drive fan, mount for air flow back to front of computer (rear fan pushes air into computer, front fan pushes air into hard disk enclosure, out of computer; remove stock Sonata3 fan): http://www.ncix.com/products/?sku=18432&amp;amp;vpn=PRO%20120MM%20DBB&amp;amp;manufacture=Antec&lt;br /&gt;
&lt;br /&gt;
=== Version 2011-FEB-08 Intel Socket 1366 ===&lt;br /&gt;
&lt;br /&gt;
* Mobo: ASUS P6X58D Premium: http://www.ncix.com/products/?sku=46706&amp;amp;vpn=P6X58D%20Premium&amp;amp;manufacture=ASUS&lt;br /&gt;
* CPU: Intel i7-950: http://www.ncix.com/products/?sku=39590&amp;amp;vpn=BX80601950&amp;amp;manufacture=Intel&lt;br /&gt;
* RAM: 1 or 2 kits of 3x4GB=12GB: http://www.ncix.com/products/?sku=55545&amp;amp;vpn=998770&amp;amp;manufacture=Mushkin%20Enhanced&lt;br /&gt;
* Case: Antec Sonata III: http://www.ncix.com/products/?sku=24294&amp;amp;vpn=SONATA%20III%20500&amp;amp;manufacture=Antec&amp;amp;promoid=1285&lt;br /&gt;
* Video card: PCIe VGA+DVI+HDMI MSI GeForce 210 (silent, no fan): http://www.ncix.com/products/?sku=49482&amp;amp;vpn=N210-MD512H&amp;amp;manufacture=MSI%2FMicroStar&lt;br /&gt;
* Hard drive: 2x 2TB in fully mirrored (RAID1) configuration: http://www.ncix.com/products/?sku=49591&amp;amp;vpn=WD20EARS&amp;amp;manufacture=Western%20Digital%20WD&amp;amp;promoid=1285&lt;br /&gt;
&lt;br /&gt;
=== Version 2010-May-13 Intel Socket 1156 ===&lt;br /&gt;
&lt;br /&gt;
* Antec Sonata III computer case: http://www.ncix.com/products/index.php?sku=24294&amp;amp;vpn=SONATA%20III%20500&amp;amp;manufacture=Antec&lt;br /&gt;
* ASUS P7P55D EVO motherboard (no longer available): http://www.ncix.com/products/index.php?sku=43119&amp;amp;vpn=P7P55D%20EVO&amp;amp;manufacture=ASUS&lt;br /&gt;
* Intel i7-860 CPU: http://www.ncix.com/products/index.php?sku=42498&amp;amp;vpn=BX80605I7860&amp;amp;manufacture=Intel&lt;br /&gt;
* DDR3 memory 2x4GB=8GB kit: http://www.ncix.com/products/index.php?sku=52468&amp;amp;vpn=OCZ3G1333LV8GK&amp;amp;manufacture=OCZ%20Technology&lt;br /&gt;
* MSI video card: http://www.ncix.com/products/index.php?sku=49482&amp;amp;vpn=N210-MD512H&amp;amp;manufacture=MSI%2FMicroStar&lt;br /&gt;
* 2TB hard disk: http://www.ncix.com/products/index.php?sku=49591&amp;amp;vpn=WD20EARS&amp;amp;manufacture=Western%20Digital%20WD&lt;br /&gt;
&lt;br /&gt;
=== Version X Intel Socket 775 ===&lt;br /&gt;
&lt;br /&gt;
* mobo: ASUS P5B-VM&lt;br /&gt;
* CPU: Intel dual core 2.4 GHz&lt;br /&gt;
* RAM: DDR2-800&lt;br /&gt;
* SATA disks&lt;br /&gt;
&lt;br /&gt;
=== Version X AMD AM2/AM3 ===&lt;br /&gt;
&lt;br /&gt;
* mobo: ASUS Crosshair and Crosshair II&lt;br /&gt;
* CPU: assorted multicore socket AM2/AM3 CPU&lt;br /&gt;
* RAM: DDR2-800&lt;br /&gt;
&lt;br /&gt;
=== Version X AMD Socket 939 ===&lt;br /&gt;
&lt;br /&gt;
* mobo: ASUS A8N-E&lt;br /&gt;
* CPU: AMD assorted socket 939 1-2 core CPUs&lt;br /&gt;
* RAM: DDR400 UDIMMs up to 4x1GB=4GB total&lt;br /&gt;
* up to 4x SATA disks&lt;br /&gt;
&lt;br /&gt;
=== Version X AMD Dual Socket 940 ===&lt;br /&gt;
&lt;br /&gt;
* mobo: assorted supermicro, asus, msi&lt;br /&gt;
* CPU: AMD Opteron Socket 940 assorted speed grades&lt;br /&gt;
* RAM: registered and registered+ECC DDR400&lt;br /&gt;
&lt;br /&gt;
=== Version X AMD Dual Socket A ===&lt;br /&gt;
&lt;br /&gt;
* mobo: ASUS A7M266-D&lt;br /&gt;
* CPU: dual Athlon-MP 1.8-2.2 GHz&lt;br /&gt;
* RAM: DDR266&lt;br /&gt;
&lt;br /&gt;
=== Version X Intel Dual Pentium3 ===&lt;br /&gt;
&lt;br /&gt;
* mobo: ASUS CUV4X-D&lt;br /&gt;
* CPU: dual Pentium3 1GHz&lt;br /&gt;
* RAM: SDR133&lt;br /&gt;
&lt;br /&gt;
=== Version X Intel Dual Pentium2 ISA ===&lt;br /&gt;
&lt;br /&gt;
* mobo: ASUS P2B-D&lt;br /&gt;
* CPU: dual slot Pentium2 400-800 MHz&lt;br /&gt;
* RAM: SDR100, SDR133&lt;/div&gt;</summary>
		<author><name>Pierre</name></author>
	</entry>
	<entry>
		<id>https://daq00.triumf.ca/DaqWiki/index.php?title=PcHardware&amp;diff=7318</id>
		<title>PcHardware</title>
		<link rel="alternate" type="text/html" href="https://daq00.triumf.ca/DaqWiki/index.php?title=PcHardware&amp;diff=7318"/>
		<updated>2023-09-18T23:36:56Z</updated>

		<summary type="html">&lt;p&gt;Pierre: /* Version 2022-Dec AMD DDR5 PC */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;== DAQ PC Configurations ==&lt;br /&gt;
&lt;br /&gt;
=== Buying from newegg.ca ===&lt;br /&gt;
&lt;br /&gt;
* select &amp;quot;shipped by newegg&amp;quot;&lt;br /&gt;
* select &amp;quot;ship from country: Canada&amp;quot;&lt;br /&gt;
&lt;br /&gt;
=== Standard components ===&lt;br /&gt;
&lt;br /&gt;
==== Fans ====&lt;br /&gt;
&lt;br /&gt;
* long life time (150&#039;000 hrs) 4pin PWM 120mm fan:&lt;br /&gt;
** http://www.ncix.com/products/?sku=24331&amp;amp;vpn=ACF12PWM&amp;amp;manufacture=Arctic%20Cooling&lt;br /&gt;
** http://www.ncix.com/detail/noctua-nf-s12a-pwm-120mm-ultra-7e-79672.htm&lt;br /&gt;
* long life time (150&#039;000 hrs) 3pin (non-PWM) 120mm fan:&lt;br /&gt;
** http://www.ncix.ca/products/?sku=35020&amp;amp;vpn=D1225C12B5AP-15&amp;amp;manufacture=Scythe&amp;amp;promoid=1268&lt;br /&gt;
** http://www.ncix.com/detail/noctua-nf-s12a-flx-120mm-ultra-b4-79670.htm&lt;br /&gt;
&lt;br /&gt;
==== Power supplies ====&lt;br /&gt;
&lt;br /&gt;
Power supply requirements:&lt;br /&gt;
* 120mm cooling fan (longer life, better air flow vs small fans)&lt;br /&gt;
* ActivePFC (no 110/220V switch, high power factor is required for use with UPSes)&lt;br /&gt;
* 4 or more SATA power connectors&lt;br /&gt;
&lt;br /&gt;
==== SSD ====&lt;br /&gt;
&lt;br /&gt;
* M.2 PCIe SSD not recommended, if there is a glitch, PCIe bus hangs, computer stops without error messages, impossible to debug. also not clear how to recover data from this type of SSD if mobo dies.&lt;br /&gt;
* SATA: WD blue 250GB, 500GB, 1TB, 2TB &lt;br /&gt;
* M.2 SATA: WD blue&lt;br /&gt;
* (obsolete) SATA: Kingston V200, V200+, V300 - 60GB, 120GB&lt;br /&gt;
* (obsolete) M.2: (proposed) Kingston SSDNow M.2 2280 120GB http://www.newegg.ca/Product/Product.aspx?Item=N82E16820104482&lt;br /&gt;
&lt;br /&gt;
=== Version 2022-Dec AMD DDR5 PC ===&lt;br /&gt;
&lt;br /&gt;
(in progress. CPU not available at this moment!)&lt;br /&gt;
&lt;br /&gt;
Notes:&lt;br /&gt;
* use B560/X670 chipset, no separate chipset cooling fan&lt;br /&gt;
* count available PCIe slots, usually only 1 x16 slots, up to 2 x4 slots (look like x16 slots) and a few x1 slots (short ones)&lt;br /&gt;
* DDR5 includes on-chip ECC&lt;br /&gt;
* DDR5 ECC memory has additional lanes for on-CPU ECC. CPU and mobo must say &amp;quot;ECC supported&amp;quot;&lt;br /&gt;
* use 1.1V DDR5-4800-40 RAM&lt;br /&gt;
* use 1.2V DDR5-5200-40 RAM&lt;br /&gt;
* use 1.25V DDR5-5200-36 RAM (fastest)&lt;br /&gt;
&lt;br /&gt;
* $450 AMD 7700 8-Core 3.8/5.3 GHz 65W https://www.newegg.ca/amd-ryzen-7-7700/p/N82E16819113786?Item=N82E16819113786&lt;br /&gt;
* (not this one) $350 AMD 7600X 6-core 4.7/5.3 GHz 105W https://www.newegg.ca/amd-ryzen-5-7600x-ryzen-5-7000-series/p/N82E16819113770?Item=N82E16819113770&lt;br /&gt;
* $300 ASUS Prime B560-PLUS (ECC, PCIe x8,x4,x1,x1) https://www.newegg.ca/asus-prime-b650-plus/p/N82E16813119607?Item=N82E16813119607&lt;br /&gt;
* $400 2x32GB https://www.newegg.ca/g-skill-64gb/p/N82E16820374440?Item=N82E16820374440&lt;br /&gt;
* $65 500W P.S. https://www.newegg.ca/thermaltake-smart-500w-ps-spd-0500npcwus-w/p/N82E16817153233?Item=N82E16817153233&lt;br /&gt;
&lt;br /&gt;
* $45 WD Blue 250GB SA5 SSD https://www.newegg.ca/western-digital-250gb-blue-sa510/p/N82E16820250227&lt;br /&gt;
&lt;br /&gt;
=== Version 2022-Aug AMD reduced cost PC ===&lt;br /&gt;
&lt;br /&gt;
Differences from &amp;quot;big PC&amp;quot;:&lt;br /&gt;
* cheapest 5000-series &amp;quot;G&amp;quot; CPU&lt;br /&gt;
* non-ECC memory&lt;br /&gt;
* small size motherboard&lt;br /&gt;
&lt;br /&gt;
Notes:&lt;br /&gt;
* use B550 chipset (X570 runs hot, requires short-life small cooling fan. avoid)&lt;br /&gt;
* use AMD &amp;quot;5000X&amp;quot; CPUs for ECC memory support (&amp;quot;5000G&amp;quot; CPUs are missing Linux ECC drivers)&lt;br /&gt;
* use 1.2V DDR4 SDRAM. current size is 2x 32GB (dual-channel memory)&lt;br /&gt;
&lt;br /&gt;
Parts:&lt;br /&gt;
* $250 https://www.newegg.ca/amd-ryzen-5-5600g-ryzen-5-5000-g-series/p/N82E16819113683&lt;br /&gt;
* $300 https://www.newegg.ca/team-64gb-288-pin-ddr4-sdram/p/N82E16820331582?Item=N82E16820331582&lt;br /&gt;
* $210 https://www.newegg.ca/asus-tuf-gaming-b550m-plus-wifi-ii/p/N82E16813119569?Item=N82E16813119569&lt;br /&gt;
* 2x$55 https://www.newegg.ca/western-digital-250gb-blue-sa510/p/N82E16820250227?Item=N82E16820250227&lt;br /&gt;
* $70 https://www.newegg.ca/rosewill-arc-series-arc-550-continuous-550w-40-degree-c/p/N82E16817182297?Item=N82E16817182297&lt;br /&gt;
* $0 chassis (reuse existing)&lt;br /&gt;
* total: 250+300+210+2*55+70 = 940&lt;br /&gt;
&lt;br /&gt;
=== Version 2021-Sep AMD big PC ===&lt;br /&gt;
&lt;br /&gt;
* use B550 chipset (X570 runs hot, requires short-life small cooling fan. avoid)&lt;br /&gt;
* use AMD &amp;quot;5000X&amp;quot; CPUs for ECC memory support (&amp;quot;5000G&amp;quot; CPUs are missing Linux ECC drivers)&lt;br /&gt;
&lt;br /&gt;
* https://www.newegg.ca/amd-ryzen-7-5700g-ryzen-7-5000-g-series/p/N82E16819113682&lt;br /&gt;
* https://www.newegg.ca/asus-rog-strix-b550-xe-gaming-wifi/p/N82E16813119363&lt;br /&gt;
* https://www.newegg.ca/p/1X5-003Z-018J2&lt;br /&gt;
* https://www.newegg.ca/western-digital-blue-250gb/p/N82E16820250086&lt;br /&gt;
* https://www.newegg.ca/antec-vp-plus-series-vp550-plus-550w/p/N82E16817371113?Item=N82E16817371113&lt;br /&gt;
&lt;br /&gt;
* AMD Ryzen 7 5700G 8-Core Processor with graphics&lt;br /&gt;
* mobo ASUS ROG STRIX B550-XE GAMING&lt;br /&gt;
* 2x32GB DDR4-3200 RAM (64GB total with 2 empty slots to add more later)&lt;br /&gt;
* ECC memory is recommended, NEMIX RAM always available on newegg.ca&lt;br /&gt;
* dual SATA SSD for OS (Ubuntu LTS 20.04, install on ZFS)&lt;br /&gt;
* dual HDDs as needed&lt;br /&gt;
&lt;br /&gt;
=== Version 2021-Jan AMD big PC ===&lt;br /&gt;
&lt;br /&gt;
* AMD Ryzen 7 3700X 8-Core Processor&lt;br /&gt;
* mobo ASUS ROG STRIX B550-E GAMING&lt;br /&gt;
* 2x32GB DDR4-3200 RAM (64GB total with 2 empty slots to add more later)&lt;br /&gt;
* ECC memory is recommended, but availability and price not clear&lt;br /&gt;
* dual SATA SSD for OS (Ubuntu LTS 20.04)&lt;br /&gt;
* dual HDDs as needed&lt;br /&gt;
&lt;br /&gt;
=== Version 2019-July-05 Reduced Cost PC ===&lt;br /&gt;
&lt;br /&gt;
Purchased for MUSR DAQ refresh. $900 per machine.&lt;br /&gt;
&lt;br /&gt;
* mobo: ASUS TUF Z390M-Pro&lt;br /&gt;
* CPU: Intel i5-9400 2.9GHz 65W&lt;br /&gt;
* RAM: DDR4-3200&lt;br /&gt;
* P.S.: Thermaltake 500W&lt;br /&gt;
* Case: Antec VSK3000 Elite MicroATX minitower&lt;br /&gt;
&lt;br /&gt;
=== Version 2018-June-29 Intel Socket 1151 ===&lt;br /&gt;
&lt;br /&gt;
Recently bought three new DAQ computers from ELCO, with following MOBO and CPU&lt;br /&gt;
&lt;br /&gt;
* MOBO: ASUS TUF Z370 Plus Gaming LGA 1151 ATX&lt;br /&gt;
* CPU: Intel Core i7-8700 LGA1151 (3.20GHz, L3:12M, Hex Core, TDP: 65W)&lt;br /&gt;
* RAM: DDR4-2667&lt;br /&gt;
&lt;br /&gt;
Full quote available [https://www.triumf.info/wiki/DAQwiki/index.php/Image:Quote_3078.pdf here].&lt;br /&gt;
&lt;br /&gt;
=== Version ??? Intel Socket 1151 ===&lt;br /&gt;
&lt;br /&gt;
* Mobo: Z270&lt;br /&gt;
* Mobo: Z170&lt;br /&gt;
* RAM: DDR4&lt;br /&gt;
&lt;br /&gt;
=== Version 2017-01-17 Reduced Cost PC ===&lt;br /&gt;
&lt;br /&gt;
$700 per machine&lt;br /&gt;
&lt;br /&gt;
* CPU: Intel i3-7100 CPU @ 3.90GHz&lt;br /&gt;
* Mobo: ASUS H110M-A/M.2&lt;br /&gt;
* RAM: single 16GB DIMM DDR4-2133&lt;br /&gt;
* SSD: Kingston 120GB SATA M.2&lt;br /&gt;
* P.S.: Thermaltake TR2 500W&lt;br /&gt;
* Chassis: Antec VSK3000E-U3 minitower&lt;br /&gt;
&lt;br /&gt;
=== Version 2015-NOV-17 Intel Socket 1151 ===&lt;br /&gt;
&lt;br /&gt;
* this is the new standard DAQ PC replacing the socket 1150 DAQ PC. Improvement: max of 64GB RAM (vs 32GB on Z87/Z97), max 2 monitors (vs 3 on Z87/Z97)&lt;br /&gt;
* price: mobo($400) + CPU($300) + RAM ($600 for 64GB) + SSD ($75 for 120GB) + storage ($xxx for dual mirrored 6TB) = $1500 + storage.&lt;br /&gt;
* Mobo: ASUS Z170-DELUXE CAD$400 http://www.newegg.ca/Product/Product.aspx?Item=N82E16813132568 https://www.asus.com/ca-en/Motherboards/Z170-DELUXE/&lt;br /&gt;
* CPU: Intel Core i5-6600 6M Quad-Core 3.3 GHz (no ECC) http://www.newegg.ca/Product/Product.aspx?Item=N82E16819117562 http://ark.intel.com/products/88188/Intel-Core-i5-6600-Processor-6M-Cache-up-to-3_90-GHz&lt;br /&gt;
* Case1: Antec Sonata III 500: http://www.ncix.com/products/?sku=24294&amp;amp;vpn=SONATA%20III%20500&amp;amp;manufacture=Antec&amp;amp;promoid=1285&lt;br /&gt;
* Case2: Antec Sonata Proto (no power supply) http://www.ncix.ca/products/?sku=52550&amp;amp;vpn=SONATA%20PROTO&amp;amp;manufacture=Antec, add high power power supply from list above.&lt;br /&gt;
* SSD storage: KINGSTON SM2280S3120G http://www.newegg.ca/Product/Product.aspx?Item=N82E16820104482&amp;amp;cm_re=KINGSTON_SM2280S3120G-_-20-104-482-_-Product&lt;br /&gt;
* SSD storage: Kingston SM2280S3G2/120G M.2 2280 http://www.newegg.ca/Product/Product.aspx?Item=2BN-001M-00010&lt;br /&gt;
* Storage: 2x 6TB in fully mirrored (RAID1) configuration: (use cheapest available NAS 6TB disks, i.e. WD &amp;quot;red&amp;quot; or &amp;quot;purple&amp;quot;)&lt;br /&gt;
* RAM: 32GB: use cheapest kit of 2x16GB DDR4 - CAD$300 - http://www.newegg.ca/Product/Product.aspx?Item=N82E16820231965&lt;br /&gt;
* RAM: 64GB: use cheapest kit of 4x16GB DDR4 - CAD$600 - http://www.newegg.ca/Product/Product.aspx?Item=N82E16820231968&lt;br /&gt;
* Cooling fans: replace stock short-life-time fans with new long-life-time fans, see list above.&lt;br /&gt;
* Instructions for mounting cooling fans: remove stock short-life-time fans, mount replacement fans for air flow from back to front of the case: 1 rear case fan, 1 front mounted fan blowing on the hard drives. Remove front air filter, duct-tape shut all rear, side and bottom air holes - air flow should be: rear fan pushes air into computer, front fan pushes air into hard disk enclosure, out of computer through the front of the case where the air filter used to be.&lt;br /&gt;
&lt;br /&gt;
=== Version 2014-DEC-8 Intel Socket 1150 ===&lt;br /&gt;
&lt;br /&gt;
* this is the new standard DAQ PC replacing the socket 2011 DAQ PC. Improvement: no need for external video card - this permits mounting in 2U and 3U chassis, on board support for 3 large LCD monitors, use latest Intel CPUs. Drawback: 32GB RAM max instead of 64GB RAM, dual-channel ram instead of quad-channel RAM.&lt;br /&gt;
* price: $840 + RAM ($370 for 32GB) + SSD ($75 for 120GB) + storage ($400 for dual mirrored 4TB) = $1700.&lt;br /&gt;
* Mobo: ASUS Z97 WS http://www.asus.com/ca-en/Motherboards/Z97WS http://www.newegg.ca/Product/Product.aspx?Item=N82E16813132126&lt;br /&gt;
* CPU: Intel i7-4790K http://ark.intel.com/products/80807 http://www.newegg.ca/Product/Product.aspx?Item=N82E16819117369&lt;br /&gt;
* Case1: Antec Sonata III 500: http://www.ncix.com/products/?sku=24294&amp;amp;vpn=SONATA%20III%20500&amp;amp;manufacture=Antec&amp;amp;promoid=1285&lt;br /&gt;
* Case2: Antec Sonata Proto (no power supply) http://www.ncix.ca/products/?sku=52550&amp;amp;vpn=SONATA%20PROTO&amp;amp;manufacture=Antec, add high power power supply from list above.&lt;br /&gt;
* SSD storage: use SSD from list above. (Possible to use &amp;quot;M.2 Socket 3 with M Key&amp;quot; SSD, see mobo manual)&lt;br /&gt;
* Storage: 2x 4TB in fully mirrored (RAID1) configuration: (use cheapest available 4TB disks)&lt;br /&gt;
* RAM: use cheapest (32GB) kit of 4x8GB DDR3-1600 RAM: http://www.ncix.ca/products/?sku=65663&amp;amp;vpn=F3-12800CL10Q-32GBZL&amp;amp;manufacture=G%2ESkill http://www.ncix.com/detail/g-skill-ripjawsz-f3-12800cl10q-32gbzl-32gb-4x8gb-dc-65663.htm&lt;br /&gt;
* Video card: none, using Intel on-CPU video&lt;br /&gt;
* Cooling fans: (replace stock short-life-time fans) - 2 per PC - http://www.ncix.com/detail/noctua-nf-s12a-flx-120mm-ultra-b4-79670.htm&lt;br /&gt;
* Instructions for mounting cooling fans: remove stock short-life-time fans, mount replacement fans for air flow from back to front of the case: 1 rear case fan, 1 front mounted fan blowing on the hard drives. Remove front air filter, duct-tape shut all rear, side and bottom air holes - air flow should be: rear fan pushes air into computer, front fan pushes air into hard disk enclosure, out of computer through the front of the case where the air filter used to be.&lt;br /&gt;
* (to be updated) Cooling fans note: ASUS Z87 WS motherboard requires use of non-PWM fans. The 4-pin fan headers do not provide PWM fan control - see mobo manual - pwm pin is hardwired to +5V. Only the 4-pin fan header CPU_OPT has PWM control - connect a PWM fan (4-pin connector) - but it will run at same speed as the main CPU fan.&lt;br /&gt;
&lt;br /&gt;
=== Version 2014-May-07 Reduced cost PC ===&lt;br /&gt;
&lt;br /&gt;
* this replaces the specs for the E-350/E-450 reduced cost PC&lt;br /&gt;
* total price around $235 + RAM ($190) + SSD ($75) = $500&lt;br /&gt;
* Mobo:  ASUS AM1M-A - http://www.asus.com/Motherboards/AM1MA http://www.ncix.com/detail/asus-am1m-a-matx-am1-ddr3-47-96120.htm http://www.newegg.ca/Product/Product.aspx?Item=9SIA7RD2WU4767&lt;br /&gt;
* CPU: AMD Athlon 5350 2GHz - http://www.ncix.com/detail/amd-athlon-5350-am1-2-0ghz-ef-95079-1308.htm http://www.newegg.ca/Product/Product.aspx?Item=N82E16819113364&lt;br /&gt;
* RAM: cheapest DDR3-1600 2x8GB or 4x8GB kit - http://www.ncix.com/detail/g-skill-ripjawsz-f3-12800cl10q-32gbzl-32gb-4x8gb-dc-65663.htm&lt;br /&gt;
* Case: MicroATX with provision for side-mounted 120mm fan - http://www.ncix.com/detail/fractal-design-core-1000-matx-54-81159.htm http://www.newegg.ca/Product/Product.aspx?Item=N82E16811352032&lt;br /&gt;
* Power supply: Cheapest with 120mm fan and active PFC - http://www.ncix.com/products/?sku=30144&amp;amp;vpn=SS-350ET&amp;amp;manufacture=Seasonic%20Electronics&lt;br /&gt;
* Cooling fan: extra-long-life 120mm PWM fan - http://www.ncix.com/detail/noctua-nf-s12a-pwm-120mm-ultra-7e-79672.htm&lt;br /&gt;
* Storage: Kingston 120GB SSD - http://www.ncix.com/detail/kingston-ssdnow-v300-120gb-2-5in-8c-78078-1078.htm&lt;br /&gt;
&lt;br /&gt;
=== Version 2014-MAY-8 Intel Socket 1150 ===&lt;br /&gt;
&lt;br /&gt;
* this is the new standard DAQ PC replacing the socket 2011 DAQ PC. Improvement: no need for external video card - this permits mounting in 2U and 3U chassis, on board support for 3 large LCD monitors, use latest Intel CPUs. Drawback: 32GB RAM max instead of 64GB RAM, dual-channel ram instead of quad-channel RAM.&lt;br /&gt;
* price: $840 + RAM ($370 for 32GB) + SSD ($75 for 120GB) + storage ($400 for dual mirrored 4TB) = $1700.&lt;br /&gt;
* Mobo: ASUS Z87 WS http://www.asus.com/Motherboards/Z87WS/#specifications http://www.ncix.com/detail/asus-motherboard-z87-ws-core-i7-i5-i3-ca-2222138415.htm&lt;br /&gt;
* CPU: Intel i7-4770 http://ark.intel.com/products/75122/Intel-Core-i7-4770-Processor-8M-Cache-up-to-3_90-GHz http://products.ncix.com/detail/intel-core-i7-4770-quad-core-3-4ghz-processor-lga1150-haswell-8mb-cache-retail-86-81326.htm&lt;br /&gt;
* Case1: Antec Sonata III 500: http://www.ncix.com/products/?sku=24294&amp;amp;vpn=SONATA%20III%20500&amp;amp;manufacture=Antec&amp;amp;promoid=1285&lt;br /&gt;
* Case2: Antec Sonata Proto (no power supply) http://www.ncix.ca/products/?sku=52550&amp;amp;vpn=SONATA%20PROTO&amp;amp;manufacture=Antec, add high power power supply from list above.&lt;br /&gt;
* SSD storage: use SSD from list above. Or use mSATA SSD in the mSATA slot (remember to move the jumper switch per mobo manual).&lt;br /&gt;
* Storage: 2x 4TB in fully mirrored (RAID1) configuration: (use cheapest available 4TB disks)&lt;br /&gt;
* RAM: 1 (32GB) kit of 4x8GB DDR3-1600 RAM : http://www.ncix.ca/products/?sku=65663&amp;amp;vpn=F3-12800CL10Q-32GBZL&amp;amp;manufacture=G%2ESkill http://www.ncix.com/detail/g-skill-ripjawsz-f3-12800cl10q-32gbzl-32gb-4x8gb-dc-65663.htm&lt;br /&gt;
* Video card: none, using Intel on-CPU video&lt;br /&gt;
* Cooling fans: (replace stock short-life-time fans) - 2 per PC - http://www.ncix.com/detail/noctua-nf-s12a-flx-120mm-ultra-b4-79670.htm&lt;br /&gt;
* Instructions for mounting cooling fans: remove stock short-life-time fans, mount replacement fans for air flow from back to front of the case: 1 rear case fan, 1 front mounted fan blowing on the hard drives. Remove front air filter, duct-tape shut all rear, side and bottom air holes - air flow should be: rear fan pushes air into computer, front fan pushes air into hard disk enclosure, out of computer through the front of the case where the air filter used to be.&lt;br /&gt;
* Cooling fans note: ASUS Z87 WS motherboard requires use of non-PWM fans. The 4-pin fan headers do not provide PWM fan control - see mobo manual - pwm pin is hardwired to +5V. Only the 4-pin fan header CPU_OPT has PWM control - connect a PWM fan (4-pin connector) - but it will run at same speed as the main CPU fan.&lt;br /&gt;
&lt;br /&gt;
=== Version 2014-MAY-8 Intel Socket 2011 ===&lt;br /&gt;
&lt;br /&gt;
* High end machine with 64 GB RAM max, total price: $1100 + RAM ($370/32GB) + storage ($400 for 2x4TB disks) = $1900&lt;br /&gt;
* Mobo: ASUS P9X79 WS (dual-Intel GigE): http://www.asus.com/ca-en/Motherboards/P9X79_WS/#specifications http://ca.asus.com/Motherboards/Intel_Socket_2011/P9X79_WS/#specifications http://www.ncix.ca/products/?sku=66066&amp;amp;vpn=P9X79%20WS&amp;amp;manufacture=ASUS&amp;amp;promoid=1259 &lt;br /&gt;
* CPU: Intel i7-4820k: http://products.ncix.com/detail/intel-core-i7-4820k-quad-core-3-7ghz-3-9ghz-turbo-10mb-hyperthreading-lga2011-processor-no-hsf-e2-89509-1019.htm&lt;br /&gt;
* CPU cooler: Cooler Master Hyper 212 Evo (very high profile, fits the Sonata case) http://www.ncix.ca/products/?sku=64385&lt;br /&gt;
* CPU cooler for rackmounted use: (NOTE: this cooler is very low profile and obstructs some memory slots) http://www.ncix.ca/products/?sku=67626&amp;amp;vpn=SCBSK-2100&amp;amp;manufacture=Scythe&lt;br /&gt;
* Case: Antec Sonata III 500: http://www.ncix.com/products/?sku=24294&amp;amp;vpn=SONATA%20III%20500&amp;amp;manufacture=Antec&amp;amp;promoid=1285&lt;br /&gt;
* SSD storage (system disk only, no data storage): use cheapest available Kingston V100 or V200 SSD size 32GB or bigger : http://www.ncix.ca/products/?sku=65084&amp;amp;vpn=SV100S2%2F32G&amp;amp;manufacture=Kingston http://www.ncix.ca/products/?sku=67531&amp;amp;vpn=SVP200S3%2F60G&amp;amp;manufacture=Kingston&amp;amp;promoid=1230&lt;br /&gt;
* Storage: 2x 3TB in fully mirrored (RAID1) configuration: (use cheapest available 3TB disks) http://www.ncix.ca/products/?sku=62178&amp;amp;vpn=WD30EZRX&amp;amp;manufacture=Western%20Digital%20WD&lt;br /&gt;
* Storage: 2x 4TB in fully mirrored (RAID1) configuration: (use cheapest available 4TB disks): http://www.ncix.com/detail/western-digital-green-4tb-sata3-b3-90788-1078.htm&lt;br /&gt;
* RAM: 1 (32GB) or 2 (64GB) kits of 4x8GB DDR3-1600 RAM : http://www.ncix.ca/products/?sku=65663&amp;amp;vpn=F3-12800CL10Q-32GBZL&amp;amp;manufacture=G%2ESkill&lt;br /&gt;
* Video card: PCIe VGA+DVI+HDMI fan-less: http://products.ncix.com/detail/asus-geforce-gt-610-fanless-810mhz-2gb-1200mhz-gddr3-dvi-hdmi-vga-pci-e-video-card-73-75560.htm&lt;br /&gt;
* replacement for stock cooling fans, 2 per computer (1 rear case fan, 1 front disk drive fan, mount for air flow back to front of computer - rear fan pushes air into computer, front fan pushes air into hard disk enclosure, out of computer; remove stock Sonata3 fan, remove front air filter, duck-tape clkosed all rear and side case openings - except for rear fan intake and front fan exhaust through front panel louvers) : for fans, use PWM or non-PWM fans from list above.&lt;br /&gt;
&lt;br /&gt;
=== Version 2012-OCT-4 AMD-E450 reduced cost PC (PRELIMINARY) ===&lt;br /&gt;
&lt;br /&gt;
* mobo+cpu combo: ASUS E45M1-M PRO 1.6GHz dual core: http://www.ncix.com/products/?sku=76096&amp;amp;vpn=E45M1-M%20PRO&amp;amp;manufacture=ASUS, http://www.newegg.ca/Product/Product.aspx?Item=N82E16813131875&lt;br /&gt;
* case: MicroATX mini tower, no ATX P.S.: http://www.newegg.ca/Product/Product.aspx?Item=N82E16811352009, http://www.ncix.com/products/?sku=58341&amp;amp;vpn=FD-CA-CORE-1000-BL&amp;amp;manufacture=Fractal%20Design&lt;br /&gt;
* power supply: low power power supply from list above&lt;br /&gt;
* ram: use single 4GB DDR3-1333 memory module (buy cheapest available)&lt;br /&gt;
* cooling fan: use 120mm 4pin PWM fan from list above&lt;br /&gt;
* boot disk: (USB Flash) Patriot RageXT 16GB USB: http://www.ncix.com/products/?sku=54556&amp;amp;vpn=PEF16GRUSB&amp;amp;manufacture=Patriot&amp;amp;promoid=1370, http://www.ncix.com/products/?sku=111127636&amp;amp;vpn=PEF16GRUSB&amp;amp;manufacture=Patriot&lt;br /&gt;
* boot disk: (SSD) use SSD from list above&lt;br /&gt;
&lt;br /&gt;
=== Version 2011-SEP-05 AMD-E350 reduced cost PC ===&lt;br /&gt;
&lt;br /&gt;
* mobo+cpu combo: ASUS E35M1-M PRO 1.6GHz dual core: http://www.ncix.com/products/?sku=59256&amp;amp;vpn=E35M1-M%20PRO&amp;amp;manufacture=ASUS&lt;br /&gt;
* case: MicroATX mini tower, no ATX P.S.: http://www.newegg.ca/Product/Product.aspx?Item=N82E16811352009, http://www.ncix.com/products/?sku=58341&amp;amp;vpn=FD-CA-CORE-1000-BL&amp;amp;manufacture=Fractal%20Design&lt;br /&gt;
* power supply: http://www.ncix.com/products/?sku=30144&amp;amp;vpn=SS-350ET&amp;amp;manufacture=Seasonic%20Electronics&lt;br /&gt;
* ram: use single 4GB DDR3-1333 memory module (buy cheapest available)&lt;br /&gt;
* cooling fan (use 120mm 4pin PWM fan): http://www.ncix.com/products/?sku=24331&amp;amp;vpn=ACF12PWM&amp;amp;manufacture=Arctic%20Cooling&lt;br /&gt;
* boot disk: Patriot RageXT 16GB USB: http://www.ncix.com/products/?sku=54556&amp;amp;vpn=PEF16GRUSB&amp;amp;manufacture=Patriot&amp;amp;promoid=1370&lt;br /&gt;
&lt;br /&gt;
=== Version 2011-OCT-31 Intel Socket 1366 ===&lt;br /&gt;
&lt;br /&gt;
* Mobo: ASUS P6X58-E WS (NOTE: only PCIe slots - no PCI slots at all!!!): http://www.ncix.ca/products/?sku=2222110300&amp;amp;vpn=P6X58-E%20WS&amp;amp;manufacture=ASUS%20TeK also http://www.newegg.ca/Product/Product.aspx?Item=N82E16813131715&lt;br /&gt;
* CPU: Intel i7-960: http://www.ncix.com/products/?sku=51240&amp;amp;vpn=BX80601960&amp;amp;manufacture=Intel&lt;br /&gt;
* Case: Antec Sonata III: http://www.ncix.com/products/?sku=24294&amp;amp;vpn=SONATA%20III%20500&amp;amp;manufacture=Antec&amp;amp;promoid=1285&lt;br /&gt;
* Hard drive: 2x 2TB in fully mirrored (RAID1) configuration: http://www.ncix.com/products/?sku=49591&amp;amp;vpn=WD20EARS&amp;amp;manufacture=Western%20Digital%20WD&amp;amp;promoid=1285&lt;br /&gt;
* RAM: 1 or 2 kits of 3x4GB=12GB: http://www.ncix.com/products/?sku=55545&amp;amp;vpn=998770&amp;amp;manufacture=Mushkin%20Enhanced&lt;br /&gt;
* Video card: PCIe VGA+DVI+HDMI MSI GeForce 210 (silent, no fan): http://www.ncix.com/products/?sku=57604&amp;amp;vpn=N210-MD512D3H%2FLP&amp;amp;manufacture=MSI%2FMicroStar&lt;br /&gt;
* enhanced cooling fans, 2 per computer: (ball bearing 120mm high CFM air flow fan): 1 rear case fan, 1 front disk drive fan, mount for air flow back to front of computer (rear fan pushes air into computer, front fan pushes air into hard disk enclosure, out of computer; remove stock Sonata3 fan): http://www.ncix.com/products/?sku=18432&amp;amp;vpn=PRO%20120MM%20DBB&amp;amp;manufacture=Antec&lt;br /&gt;
&lt;br /&gt;
=== Version 2011-FEB-08 Intel Socket 1366 ===&lt;br /&gt;
&lt;br /&gt;
* Mobo: ASUS P6X58D Premium: http://www.ncix.com/products/?sku=46706&amp;amp;vpn=P6X58D%20Premium&amp;amp;manufacture=ASUS&lt;br /&gt;
* CPU: Intel i7-950: http://www.ncix.com/products/?sku=39590&amp;amp;vpn=BX80601950&amp;amp;manufacture=Intel&lt;br /&gt;
* RAM: 1 or 2 kits of 3x4GB=12GB: http://www.ncix.com/products/?sku=55545&amp;amp;vpn=998770&amp;amp;manufacture=Mushkin%20Enhanced&lt;br /&gt;
* Case: Antec Sonata III: http://www.ncix.com/products/?sku=24294&amp;amp;vpn=SONATA%20III%20500&amp;amp;manufacture=Antec&amp;amp;promoid=1285&lt;br /&gt;
* Video card: PCIe VGA+DVI+HDMI MSI GeForce 210 (silent, no fan): http://www.ncix.com/products/?sku=49482&amp;amp;vpn=N210-MD512H&amp;amp;manufacture=MSI%2FMicroStar&lt;br /&gt;
* Hard drive: 2x 2TB in fully mirrored (RAID1) configuration: http://www.ncix.com/products/?sku=49591&amp;amp;vpn=WD20EARS&amp;amp;manufacture=Western%20Digital%20WD&amp;amp;promoid=1285&lt;br /&gt;
&lt;br /&gt;
=== Version 2010-May-13 Intel Socket 1156 ===&lt;br /&gt;
&lt;br /&gt;
* Antec Sonata III computer case: http://www.ncix.com/products/index.php?sku=24294&amp;amp;vpn=SONATA%20III%20500&amp;amp;manufacture=Antec&lt;br /&gt;
* ASUS P7P55D EVO motherboard (no longer available): http://www.ncix.com/products/index.php?sku=43119&amp;amp;vpn=P7P55D%20EVO&amp;amp;manufacture=ASUS&lt;br /&gt;
* Intel i7-860 CPU: http://www.ncix.com/products/index.php?sku=42498&amp;amp;vpn=BX80605I7860&amp;amp;manufacture=Intel&lt;br /&gt;
* DDR3 memory 2x4GB=8GB kit: http://www.ncix.com/products/index.php?sku=52468&amp;amp;vpn=OCZ3G1333LV8GK&amp;amp;manufacture=OCZ%20Technology&lt;br /&gt;
* MSI video card: http://www.ncix.com/products/index.php?sku=49482&amp;amp;vpn=N210-MD512H&amp;amp;manufacture=MSI%2FMicroStar&lt;br /&gt;
* 2TB hard disk: http://www.ncix.com/products/index.php?sku=49591&amp;amp;vpn=WD20EARS&amp;amp;manufacture=Western%20Digital%20WD&lt;br /&gt;
&lt;br /&gt;
=== Version X Intel Socket 775 ===&lt;br /&gt;
&lt;br /&gt;
* mobo: ASUS P5B-VM&lt;br /&gt;
* CPU: Intel dual core 2.4 GHz&lt;br /&gt;
* RAM: DDR2-800&lt;br /&gt;
* SATA disks&lt;br /&gt;
&lt;br /&gt;
=== Version X AMD AM2/AM3 ===&lt;br /&gt;
&lt;br /&gt;
* mobo: ASUS Crosshair and Crosshair II&lt;br /&gt;
* CPU: assorted multicore socket AM2/AM3 CPU&lt;br /&gt;
* RAM: DDR2-800&lt;br /&gt;
&lt;br /&gt;
=== Version X AMD Socket 939 ===&lt;br /&gt;
&lt;br /&gt;
* mobo: ASUS A8N-E&lt;br /&gt;
* CPU: AMD assorted socket 939 1-2 core CPUs&lt;br /&gt;
* RAM: DDR400 UDIMMs up to 4x1GB=4GB total&lt;br /&gt;
* up to 4x SATA disks&lt;br /&gt;
&lt;br /&gt;
=== Version X AMD Dual Socket 940 ===&lt;br /&gt;
&lt;br /&gt;
* mobo: assorted supermicro, asus, msi&lt;br /&gt;
* CPU: AMD Opteron Socket 940 assorted speed grades&lt;br /&gt;
* RAM: registered and registered+ECC DDR400&lt;br /&gt;
&lt;br /&gt;
=== Version X AMD Dual Socket A ===&lt;br /&gt;
&lt;br /&gt;
* mobo: ASUS A7M266-D&lt;br /&gt;
* CPU: dual Athlon-MP 1.8-2.2 GHz&lt;br /&gt;
* RAM: DDR266&lt;br /&gt;
&lt;br /&gt;
=== Version X Intel Dual Pentium3 ===&lt;br /&gt;
&lt;br /&gt;
* mobo: ASUS CUV4X-D&lt;br /&gt;
* CPU: dual Pentium3 1GHz&lt;br /&gt;
* RAM: SDR133&lt;br /&gt;
&lt;br /&gt;
=== Version X Intel Dual Pentium2 ISA ===&lt;br /&gt;
&lt;br /&gt;
* mobo: ASUS P2B-D&lt;br /&gt;
* CPU: dual slot Pentium2 400-800 MHz&lt;br /&gt;
* RAM: SDR100, SDR133&lt;/div&gt;</summary>
		<author><name>Pierre</name></author>
	</entry>
	<entry>
		<id>https://daq00.triumf.ca/DaqWiki/index.php?title=DarkSide&amp;diff=7052</id>
		<title>DarkSide</title>
		<link rel="alternate" type="text/html" href="https://daq00.triumf.ca/DaqWiki/index.php?title=DarkSide&amp;diff=7052"/>
		<updated>2023-02-28T18:00:00Z</updated>

		<summary type="html">&lt;p&gt;Pierre: /* DarkSide DAQ */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;= DarkSide DAQ =&lt;br /&gt;
&lt;br /&gt;
The DarkSide-20k data acquisition is to operate in a triggerless mode. This means that every photodetection unit (PDU) produces a data flow independently from its neighbours and no global decision is invoked for requesting data. Also, the experiment is composed of several thousand channels that need to be processed together in order to apply data filtering and/or data reduction before the final data recording to a storage device. The analysis time for a such large number of channels requires substantial computer processing power. The Time Slice concept is to divide the acquisition time into segments and submit them individually to a pool of Time Slice Processors (TSP). Based on the duration of the time segment, the analysis performance, and the processing power of the TSPs, an adequate number of them will be able to handle the continuous data stream from all the detectors.&lt;br /&gt;
&lt;br /&gt;
[[File:DAQ-network-01.jpg|thumb]]&lt;br /&gt;
THIS FIG shows the overall DarkSide-20K DAQ architecture. At the bottom, a global Clock is distributed to four waveform digitizers located on the top of the detector. The readout of those WFDs is done by a collection of frontend processors (FEPs) which in turn connect in turn to a second cluster of processors (TSPs, see below).&lt;br /&gt;
&lt;br /&gt;
The Time Slice concept is to segment the data-taking period across all the acquisition modules. The collected data for each segment is then presented to a TSP for processing. Once the analysis is complete, the TSP informs an independent application of its availability to process a new Time Slice.&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
Physics events happening across two consecutive Time slices is to be managed properly as the TSPs will not have access to the previous time slice. This is addressed by duplicating a fraction of the time slice to the next TSP. This overlapping time is to ensure that this extended segment covers the possible boundary events. It corresponds in our case to the maximum electron drift time within the TPC (∼5ms). The default time slice duration is 1 second, meaning that we will have 0.5% duplicate analyzed events in that overlap window.&lt;br /&gt;
&lt;br /&gt;
[[File:TimeSlice-Concept-01.jpg|thumb]]&lt;br /&gt;
THIS FIG shows the run time segmentation (abscissa). Each segment is processed by a different TSP. The total number of TSPs must be greater than the average time (in seconds) it takes to process 1 second of data.&lt;br /&gt;
The large number of PDUs (Photo Detector Units, ie. frontend electronics) or channels implies that multiple digitizers are at work. Therefore the time segmentation mechanism requires the transmission of a Time Slice Marker (TSM) to all the digitizers in order to ensure a proper segment assembly based on the Time Slice number. The readout of the individual waveform digitizer (WFD) is performed by a dedicated processor Front-End Processor (FEP). For similar processing power issues as for the TSPs, the FEP will handle a subset of WFDs (2), meaning that in our case, 24 FEPs will collect all the digitizer data. Each FEP will have to read out, filter, and assemble the data fragments from the WFDs covering the predefined time slice duration.&lt;br /&gt;
&lt;br /&gt;
[[File:Dataflow-01.jpg|thumb]]&lt;br /&gt;
The management of the transmission of the data segment to individual TSPs is left to the Pool Manager (PM)&lt;br /&gt;
application. Its role is to receive ”idle” notification from any TSPs (once the previous time slice analysis has been completed) and broadcast to all the FEPs the destination address for the upcoming segment to the next available idle TSP.&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
In order to ensure a proper Time Slice synchronization, a &amp;quot;Time Slice Marker&amp;quot; (TSM) is inserted at the WFDs level under the form of a bit. The frequency of the TSM defines the Time Slice Duration. For each TSM trigger, a WFD event is always produced and therefore will appear in the data stream at the FEP collector. The TSM event is shown in the figure below in orange. While the WFD acquisition is asynchronous due to the randomness of the event generation at the WFD level, the TSM is meant to sort the data across a given FEP based on the Time Slice number. An extra intermediate stage of data filtering or data reduction can be implemented between the Acquisition thread and the sorting thread. The Time Slice sorted output data buffer combining all the WFD of this FEP is then available to the Transfer thread pushing the requested Time Slice data to the Time Slice Processor.&lt;br /&gt;
&lt;br /&gt;
= Links =&lt;br /&gt;
&lt;br /&gt;
* https://owl.phy.queensu.ca/DS20k/TWiki/bin/view/Main/DaqPage&lt;br /&gt;
* https://dsvslice.triumf.ca&lt;br /&gt;
* [[DS-DM]] VME DS-DM board DarkSide GDM and CDM&lt;/div&gt;</summary>
		<author><name>Pierre</name></author>
	</entry>
	<entry>
		<id>https://daq00.triumf.ca/DaqWiki/index.php?title=DarkSide&amp;diff=7051</id>
		<title>DarkSide</title>
		<link rel="alternate" type="text/html" href="https://daq00.triumf.ca/DaqWiki/index.php?title=DarkSide&amp;diff=7051"/>
		<updated>2023-02-28T17:55:08Z</updated>

		<summary type="html">&lt;p&gt;Pierre: /* DarkSide DAQ */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;= DarkSide DAQ =&lt;br /&gt;
&lt;br /&gt;
The DarkSide-20k data acquisition is to operate in a triggerless mode. This means that every photodetection unit (PDU) produces a data flow independently from its neighbours and no global decision is invoked for requesting data. Also, the experiment is composed of several thousand channels that need to be processed together in order to apply data filtering and/or data reduction before the final data recording to a storage device. The analysis time for a such large number of channels requires substantial computer processing power. The Time Slice concept is to divide the acquisition time into segments and submit them individually to a pool of Time Slice Processors (TSP). Based on the duration of the time segment, the analysis performance, and the processing power of the TSPs, an adequate number of them will be able to handle the continuous data stream from all the detectors.&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
The Time Slice concept is to segment the data-taking period across all the acquisition modules. The collected data for each segment is then presented to a TSP for processing. Once the analysis is complete, the TSP informs an independent application of its availability to process a new Time Slice.&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
Physics events happening across two consecutive Time slices is to be managed properly as the TSPs will not have access to the previous time slice. This is addressed by duplicating a fraction of the time slice to the next TSP. This overlapping time is to ensure that this extended segment covers the possible boundary events. It corresponds in our case to the maximum electron drift time within the TPC (∼5ms). The default time slice duration is 1 second, meaning that we will have 0.5% duplicate analyzed events in that overlap window.&lt;br /&gt;
&lt;br /&gt;
[[File:TimeSlice-Concept-01.jpg|thumb]]&lt;br /&gt;
THIS FIG shows the run time segmentation (abscissa). Each segment is processed by a different TSP. The total number of TSPs must be greater than the average time (in seconds) it takes to process 1 second of data.&lt;br /&gt;
The large number of PDUs (Photo Detector Units, ie. frontend electronics) or channels implies that multiple digitizers are at work. Therefore the time segmentation mechanism requires the transmission of a Time Slice Marker (TSM) to all the digitizers in order to ensure a proper segment assembly based on the Time Slice number. The readout of the individual waveform digitizer (WFD) is performed by a dedicated processor Front-End Processor (FEP). For similar processing power issues as for the TSPs, the FEP will handle a subset of WFDs (2), meaning that in our case, 24 FEPs will collect all the digitizer data. Each FEP will have to read out, filter, and assemble the data fragments from the WFDs covering the predefined time slice duration.&lt;br /&gt;
&lt;br /&gt;
[[File:Dataflow-01.jpg|thumb]]&lt;br /&gt;
The management of the transmission of the data segment to individual TSPs is left to the Pool Manager (PM)&lt;br /&gt;
application. Its role is to receive ”idle” notification from any TSPs (once the previous time slice analysis has been completed) and broadcast to all the FEPs the destination address for the upcoming segment to the next available idle TSP.&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
In order to ensure a proper Time Slice synchronization, a &amp;quot;Time Slice Marker&amp;quot; (TSM) is inserted at the WFDs level under the form of a bit. The frequency of the TSM defines the Time Slice Duration. For each TSM trigger, a WFD event is always produced and therefore will appear in the data stream at the FEP collector. The TSM event is shown in the figure below in orange. While the WFD acquisition is asynchronous due to the randomness of the event generation at the WFD level, the TSM is meant to sort the data across a given FEP based on the Time Slice number. An extra intermediate stage of data filtering or data reduction can be implemented between the Acquisition thread and the sorting thread. The Time Slice sorted output data buffer combining all the WFD of this FEP is then available to the Transfer thread pushing the requested Time Slice data to the Time Slice Processor.&lt;br /&gt;
&lt;br /&gt;
= Links =&lt;br /&gt;
&lt;br /&gt;
* https://owl.phy.queensu.ca/DS20k/TWiki/bin/view/Main/DaqPage&lt;br /&gt;
* https://dsvslice.triumf.ca&lt;br /&gt;
* [[DS-DM]] VME DS-DM board DarkSide GDM and CDM&lt;/div&gt;</summary>
		<author><name>Pierre</name></author>
	</entry>
	<entry>
		<id>https://daq00.triumf.ca/DaqWiki/index.php?title=DarkSide&amp;diff=7050</id>
		<title>DarkSide</title>
		<link rel="alternate" type="text/html" href="https://daq00.triumf.ca/DaqWiki/index.php?title=DarkSide&amp;diff=7050"/>
		<updated>2023-02-28T17:53:58Z</updated>

		<summary type="html">&lt;p&gt;Pierre: /* DarkSide DAQ */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;= DarkSide DAQ =&lt;br /&gt;
&lt;br /&gt;
The DarkSide-20k data acquisition is to operate in a triggerless mode. This means that every photodetection unit (PDU) produces a data flow independently from its neighbours and no global decision is invoked for requesting data. Also, the experiment is composed of several thousand channels that need to be processed together in order to apply data filtering and/or data reduction before the final data recording to a storage device. The analysis time for a such large number of channels requires substantial computer processing power. The Time Slice concept is to divide the acquisition time into segments and submit them individually to a pool of Time Slice Processors (TSP). Based on the duration of the time segment, the analysis performance, and the processing power of the TSPs, an adequate number of them will be able to handle the continuous data stream from all the detectors.&lt;br /&gt;
&lt;br /&gt;
[[File:TimeSlice-Concept-01.jpg|thumb]]&lt;br /&gt;
The Time Slice concept is to segment the data-taking period across all the acquisition modules. The collected data for each segment is then presented to a TSP for processing. Once the analysis is complete, the TSP informs an independent application of its availability to process a new Time Slice.&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
Physics events happening across two consecutive Time slices is to be managed properly as the TSPs will not have access to the previous time slice. This is addressed by duplicating a fraction of the time slice to the next TSP. This overlapping time is to ensure that this extended segment covers the possible boundary events. It corresponds in our case to the maximum electron drift time within the TPC (∼5ms). The default time slice duration is 1 second, meaning that we will have 0.5% duplicate analyzed events in that overlap window.&lt;br /&gt;
&lt;br /&gt;
[[File:Dataflow-01.jpg|thumb]]&lt;br /&gt;
&lt;br /&gt;
THIS FIG shows the run time segmentation (abscissa). Each segment is processed by a different TSP. The total number of TSPs must be greater than the average time (in seconds) it takes to process 1 second of data.&lt;br /&gt;
The large number of PDUs (Photo Detector Units, ie. frontend electronics) or channels implies that multiple digitizers are at work. Therefore the time segmentation mechanism requires the transmission of a Time Slice Marker (TSM) to all the digitizers in order to ensure a proper segment assembly based on the Time Slice number. The readout of the individual waveform digitizer (WFD) is performed by a dedicated processor Front-End Processor (FEP). For similar processing power issues as for the TSPs, the FEP will handle a subset of WFDs (2), meaning that in our case, 24 FEPs will collect all the digitizer data. Each FEP will have to read out, filter, and assemble the data fragments from the WFDs covering the predefined time slice duration.&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
The management of the transmission of the data segment to individual TSPs is left to the Pool Manager (PM)&lt;br /&gt;
application. Its role is to receive ”idle” notification from any TSPs (once the previous time slice analysis has been completed) and broadcast to all the FEPs the destination address for the upcoming segment to the next available idle TSP.&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
In order to ensure a proper Time Slice synchronization, a &amp;quot;Time Slice Marker&amp;quot; (TSM) is inserted at the WFDs level under the form of a bit. The frequency of the TSM defines the Time Slice Duration. For each TSM trigger, a WFD event is always produced and therefore will appear in the data stream at the FEP collector. The TSM event is shown in the figure below in orange. While the WFD acquisition is asynchronous due to the randomness of the event generation at the WFD level, the TSM is meant to sort the data across a given FEP based on the Time Slice number. An extra intermediate stage of data filtering or data reduction can be implemented between the Acquisition thread and the sorting thread. The Time Slice sorted output data buffer combining all the WFD of this FEP is then available to the Transfer thread pushing the requested Time Slice data to the Time Slice Processor.&lt;br /&gt;
&lt;br /&gt;
= Links =&lt;br /&gt;
&lt;br /&gt;
* https://owl.phy.queensu.ca/DS20k/TWiki/bin/view/Main/DaqPage&lt;br /&gt;
* https://dsvslice.triumf.ca&lt;br /&gt;
* [[DS-DM]] VME DS-DM board DarkSide GDM and CDM&lt;/div&gt;</summary>
		<author><name>Pierre</name></author>
	</entry>
	<entry>
		<id>https://daq00.triumf.ca/DaqWiki/index.php?title=DarkSide&amp;diff=7049</id>
		<title>DarkSide</title>
		<link rel="alternate" type="text/html" href="https://daq00.triumf.ca/DaqWiki/index.php?title=DarkSide&amp;diff=7049"/>
		<updated>2023-02-28T17:53:13Z</updated>

		<summary type="html">&lt;p&gt;Pierre: /* DarkSide DAQ */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;= DarkSide DAQ =&lt;br /&gt;
&lt;br /&gt;
The DarkSide-20k data acquisition is to operate in a triggerless mode. This means that every photodetection unit (PDU) produces a data flow independently from its neighbours and no global decision is invoked for requesting data. Also, the experiment is composed of several thousand channels that need to be processed together in order to apply data filtering and/or data reduction before the final data recording to a storage device. The analysis time for a such large number of channels requires substantial computer processing power. The Time Slice concept is to divide the acquisition time into segments and submit them individually to a pool of Time Slice Processors (TSP). Based on the duration of the time segment, the analysis performance, and the processing power of the TSPs, an adequate number of them will be able to handle the continuous data stream from all the detectors.&lt;br /&gt;
&lt;br /&gt;
[[File:TimeSliceConcept-01.jpg|thumb]]&lt;br /&gt;
The Time Slice concept is to segment the data-taking period across all the acquisition modules. The collected data for each segment is then presented to a TSP for processing. Once the analysis is complete, the TSP informs an independent application of its availability to process a new Time Slice.&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
Physics events happening across two consecutive Time slices is to be managed properly as the TSPs will not have access to the previous time slice. This is addressed by duplicating a fraction of the time slice to the next TSP. This overlapping time is to ensure that this extended segment covers the possible boundary events. It corresponds in our case to the maximum electron drift time within the TPC (∼5ms). The default time slice duration is 1 second, meaning that we will have 0.5% duplicate analyzed events in that overlap window.&lt;br /&gt;
&lt;br /&gt;
[[File:Dataflow-01.jpg|thumb]]&lt;br /&gt;
&lt;br /&gt;
THIS FIG shows the run time segmentation (abscissa). Each segment is processed by a different TSP. The total number of TSPs must be greater than the average time (in seconds) it takes to process 1 second of data.&lt;br /&gt;
The large number of PDUs (Photo Detector Units, ie. frontend electronics) or channels implies that multiple digitizers are at work. Therefore the time segmentation mechanism requires the transmission of a Time Slice Marker (TSM) to all the digitizers in order to ensure a proper segment assembly based on the Time Slice number. The readout of the individual waveform digitizer (WFD) is performed by a dedicated processor Front-End Processor (FEP). For similar processing power issues as for the TSPs, the FEP will handle a subset of WFDs (2), meaning that in our case, 24 FEPs will collect all the digitizer data. Each FEP will have to read out, filter, and assemble the data fragments from the WFDs covering the predefined time slice duration.&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
The management of the transmission of the data segment to individual TSPs is left to the Pool Manager (PM)&lt;br /&gt;
application. Its role is to receive ”idle” notification from any TSPs (once the previous time slice analysis has been completed) and broadcast to all the FEPs the destination address for the upcoming segment to the next available idle TSP.&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
In order to ensure a proper Time Slice synchronization, a &amp;quot;Time Slice Marker&amp;quot; (TSM) is inserted at the WFDs level under the form of a bit. The frequency of the TSM defines the Time Slice Duration. For each TSM trigger, a WFD event is always produced and therefore will appear in the data stream at the FEP collector. The TSM event is shown in the figure below in orange. While the WFD acquisition is asynchronous due to the randomness of the event generation at the WFD level, the TSM is meant to sort the data across a given FEP based on the Time Slice number. An extra intermediate stage of data filtering or data reduction can be implemented between the Acquisition thread and the sorting thread. The Time Slice sorted output data buffer combining all the WFD of this FEP is then available to the Transfer thread pushing the requested Time Slice data to the Time Slice Processor.&lt;br /&gt;
&lt;br /&gt;
= Links =&lt;br /&gt;
&lt;br /&gt;
* https://owl.phy.queensu.ca/DS20k/TWiki/bin/view/Main/DaqPage&lt;br /&gt;
* https://dsvslice.triumf.ca&lt;br /&gt;
* [[DS-DM]] VME DS-DM board DarkSide GDM and CDM&lt;/div&gt;</summary>
		<author><name>Pierre</name></author>
	</entry>
	<entry>
		<id>https://daq00.triumf.ca/DaqWiki/index.php?title=File:TimeSlice-Concept-01.jpg&amp;diff=7048</id>
		<title>File:TimeSlice-Concept-01.jpg</title>
		<link rel="alternate" type="text/html" href="https://daq00.triumf.ca/DaqWiki/index.php?title=File:TimeSlice-Concept-01.jpg&amp;diff=7048"/>
		<updated>2023-02-28T17:52:36Z</updated>

		<summary type="html">&lt;p&gt;Pierre: &lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;&lt;/div&gt;</summary>
		<author><name>Pierre</name></author>
	</entry>
	<entry>
		<id>https://daq00.triumf.ca/DaqWiki/index.php?title=File:DAQ-network-01.jpg&amp;diff=7047</id>
		<title>File:DAQ-network-01.jpg</title>
		<link rel="alternate" type="text/html" href="https://daq00.triumf.ca/DaqWiki/index.php?title=File:DAQ-network-01.jpg&amp;diff=7047"/>
		<updated>2023-02-28T17:52:21Z</updated>

		<summary type="html">&lt;p&gt;Pierre: &lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;&lt;/div&gt;</summary>
		<author><name>Pierre</name></author>
	</entry>
	<entry>
		<id>https://daq00.triumf.ca/DaqWiki/index.php?title=DarkSide&amp;diff=7046</id>
		<title>DarkSide</title>
		<link rel="alternate" type="text/html" href="https://daq00.triumf.ca/DaqWiki/index.php?title=DarkSide&amp;diff=7046"/>
		<updated>2023-02-28T17:48:56Z</updated>

		<summary type="html">&lt;p&gt;Pierre: /* DarkSide DAQ */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;= DarkSide DAQ =&lt;br /&gt;
&lt;br /&gt;
The DarkSide-20k data acquisition is to operate in a triggerless mode. This means that every photodetection unit (PDU) produces a data flow independently from its neighbours and no global decision is invoked for requesting data. Also, the experiment is composed of several thousand channels that need to be processed together in order to apply data filtering and/or data reduction before the final data recording to a storage device. The analysis time for a such large number of channels requires substantial computer processing power. The Time Slice concept is to divide the acquisition time into segments and submit them individually to a pool of Time Slice Processors (TSP). Based on the duration of the time segment, the analysis performance, and the processing power of the TSPs, an adequate number of them will be able to handle the continuous data stream from all the detectors.&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
The Time Slice concept is to segment the data-taking period across all the acquisition modules. The collected data for each segment is then presented to a TSP for processing. Once the analysis is complete, the TSP informs an independent application of its availability to process a new Time Slice.&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
Physics events happening across two consecutive Time slices is to be managed properly as the TSPs will not have access to the previous time slice. This is addressed by duplicating a fraction of the time slice to the next TSP. This overlapping time is to ensure that this extended segment covers the possible boundary events. It corresponds in our case to the maximum electron drift time within the TPC (∼5ms). The default time slice duration is 1 second, meaning that we will have 0.5% duplicate analyzed events in that overlap window.&lt;br /&gt;
&lt;br /&gt;
[[File:Dataflow-01.jpg|thumb]]&lt;br /&gt;
&lt;br /&gt;
THIS FIG shows the run time segmentation (abscissa). Each segment is processed by a different TSP. The total number of TSPs must be greater than the average time (in seconds) it takes to process 1 second of data.&lt;br /&gt;
The large number of PDUs (Photo Detector Units, ie. frontend electronics) or channels implies that multiple digitizers are at work. Therefore the time segmentation mechanism requires the transmission of a Time Slice Marker (TSM) to all the digitizers in order to ensure a proper segment assembly based on the Time Slice number. The readout of the individual waveform digitizer (WFD) is performed by a dedicated processor Front-End Processor (FEP). For similar processing power issues as for the TSPs, the FEP will handle a subset of WFDs (2), meaning that in our case, 24 FEPs will collect all the digitizer data. Each FEP will have to read out, filter, and assemble the data fragments from the WFDs covering the predefined time slice duration.&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
The management of the transmission of the data segment to individual TSPs is left to the Pool Manager (PM)&lt;br /&gt;
application. Its role is to receive ”idle” notification from any TSPs (once the previous time slice analysis has been completed) and broadcast to all the FEPs the destination address for the upcoming segment to the next available idle TSP.&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
In order to ensure a proper Time Slice synchronization, a &amp;quot;Time Slice Marker&amp;quot; (TSM) is inserted at the WFDs level under the form of a bit. The frequency of the TSM defines the Time Slice Duration. For each TSM trigger, a WFD event is always produced and therefore will appear in the data stream at the FEP collector. The TSM event is shown in the figure below in orange. While the WFD acquisition is asynchronous due to the randomness of the event generation at the WFD level, the TSM is meant to sort the data across a given FEP based on the Time Slice number. An extra intermediate stage of data filtering or data reduction can be implemented between the Acquisition thread and the sorting thread. The Time Slice sorted output data buffer combining all the WFD of this FEP is then available to the Transfer thread pushing the requested Time Slice data to the Time Slice Processor.&lt;br /&gt;
&lt;br /&gt;
= Links =&lt;br /&gt;
&lt;br /&gt;
* https://owl.phy.queensu.ca/DS20k/TWiki/bin/view/Main/DaqPage&lt;br /&gt;
* https://dsvslice.triumf.ca&lt;br /&gt;
* [[DS-DM]] VME DS-DM board DarkSide GDM and CDM&lt;/div&gt;</summary>
		<author><name>Pierre</name></author>
	</entry>
	<entry>
		<id>https://daq00.triumf.ca/DaqWiki/index.php?title=DarkSide&amp;diff=7045</id>
		<title>DarkSide</title>
		<link rel="alternate" type="text/html" href="https://daq00.triumf.ca/DaqWiki/index.php?title=DarkSide&amp;diff=7045"/>
		<updated>2023-02-28T17:46:25Z</updated>

		<summary type="html">&lt;p&gt;Pierre: /* DarkSide DAQ */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;= DarkSide DAQ =&lt;br /&gt;
&lt;br /&gt;
The DarkSide-20k data acquisition is to operate in a triggerless mode. This means that every photodetection unit (PDU) produces a data flow independently from its neighbours and no global decision is invoked for requesting data. Also, the experiment is composed of several thousand channels that need to be processed together in order to apply data filtering and/or data reduction before the final data recording to a storage device. The analysis time for a such large number of channels requires substantial computer processing power. The Time Slice concept is to divide the acquisition time into segments and submit them individually to a pool of Time Slice Processors (TSP). Based on the duration of the time segment, the analysis performance, and the processing power of the TSPs, an adequate number of them will be able to handle the continuous data stream from all the detectors.&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
The Time Slice concept is to segment the data-taking period across all the acquisition modules. The collected data for each segment is then presented to a TSP for processing. Once the analysis is complete, the TSP informs an independent application of its availability to process a new Time Slice.&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
Physics events happening across two consecutive Time slices is to be managed properly as the TSPs will not have access to the previous time slice. This is addressed by duplicating a fraction of the time slice to the next TSP. This overlapping time is to ensure that this extended segment covers the possible boundary events. It corresponds in our case to the maximum electron drift time within the TPC (∼5ms). The default time slice duration is 1 second, meaning that we will have 0.5% duplicate analyzed events in that overlap window.&lt;br /&gt;
&lt;br /&gt;
[[File:Dataflow-01.png|thumb]]&lt;br /&gt;
&lt;br /&gt;
THIS FIG shows the run time segmentation (abscissa). Each segment is processed by a different TSP. The total number of TSPs must be greater than the average time (in seconds) it takes to process 1 second of data.&lt;br /&gt;
The large number of PDUs (Photo Detector Units, ie. frontend electronics) or channels implies that multiple digitizers are at work. Therefore the time segmentation mechanism requires the transmission of a Time Slice Marker (TSM) to all the digitizers in order to ensure a proper segment assembly based on the Time Slice number. The readout of the individual waveform digitizer (WFD) is performed by a dedicated processor Front-End Processor (FEP). For similar processing power issues as for the TSPs, the FEP will handle a subset of WFDs (2), meaning that in our case, 24 FEPs will collect all the digitizer data. Each FEP will have to read out, filter, and assemble the data fragments from the WFDs covering the predefined time slice duration.&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
The management of the transmission of the data segment to individual TSPs is left to the Pool Manager (PM)&lt;br /&gt;
application. Its role is to receive ”idle” notification from any TSPs (once the previous time slice analysis has been completed) and broadcast to all the FEPs the destination address for the upcoming segment to the next available idle TSP.&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
In order to ensure a proper Time Slice synchronization, a &amp;quot;Time Slice Marker&amp;quot; (TSM) is inserted at the WFDs level under the form of a bit. The frequency of the TSM defines the Time Slice Duration. For each TSM trigger, a WFD event is always produced and therefore will appear in the data stream at the FEP collector. The TSM event is shown in the figure below in orange. While the WFD acquisition is asynchronous due to the randomness of the event generation at the WFD level, the TSM is meant to sort the data across a given FEP based on the Time Slice number. An extra intermediate stage of data filtering or data reduction can be implemented between the Acquisition thread and the sorting thread. The Time Slice sorted output data buffer combining all the WFD of this FEP is then available to the Transfer thread pushing the requested Time Slice data to the Time Slice Processor.&lt;br /&gt;
&lt;br /&gt;
= Links =&lt;br /&gt;
&lt;br /&gt;
* https://owl.phy.queensu.ca/DS20k/TWiki/bin/view/Main/DaqPage&lt;br /&gt;
* https://dsvslice.triumf.ca&lt;br /&gt;
* [[DS-DM]] VME DS-DM board DarkSide GDM and CDM&lt;/div&gt;</summary>
		<author><name>Pierre</name></author>
	</entry>
	<entry>
		<id>https://daq00.triumf.ca/DaqWiki/index.php?title=File:Dataflow-01.jpg&amp;diff=7044</id>
		<title>File:Dataflow-01.jpg</title>
		<link rel="alternate" type="text/html" href="https://daq00.triumf.ca/DaqWiki/index.php?title=File:Dataflow-01.jpg&amp;diff=7044"/>
		<updated>2023-02-28T17:45:43Z</updated>

		<summary type="html">&lt;p&gt;Pierre: &lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;&lt;/div&gt;</summary>
		<author><name>Pierre</name></author>
	</entry>
	<entry>
		<id>https://daq00.triumf.ca/DaqWiki/index.php?title=DarkSide&amp;diff=7043</id>
		<title>DarkSide</title>
		<link rel="alternate" type="text/html" href="https://daq00.triumf.ca/DaqWiki/index.php?title=DarkSide&amp;diff=7043"/>
		<updated>2023-02-28T17:44:16Z</updated>

		<summary type="html">&lt;p&gt;Pierre: &lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;= DarkSide DAQ =&lt;br /&gt;
&lt;br /&gt;
The DarkSide-20k data acquisition is to operate in a triggerless mode. This means that every photodetection unit (PDU) produces a data flow independently from its neighbours and no global decision is invoked for requesting data. Also, the experiment is composed of several thousand channels that need to be processed together in order to apply data filtering and/or data reduction before the final data recording to a storage device. The analysis time for a such large number of channels requires substantial computer processing power. The Time Slice concept is to divide the acquisition time into segments and submit them individually to a pool of Time Slice Processors (TSP). Based on the duration of the time segment, the analysis performance, and the processing power of the TSPs, an adequate number of them will be able to handle the continuous data stream from all the detectors.&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
The Time Slice concept is to segment the data-taking period across all the acquisition modules. The collected data for each segment is then presented to a TSP for processing. Once the analysis is complete, the TSP informs an independent application of its availability to process a new Time Slice.&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
Physics events happening across two consecutive Time slices is to be managed properly as the TSPs will not have access to the previous time slice. This is addressed by duplicating a fraction of the time slice to the next TSP. This overlapping time is to ensure that this extended segment covers the possible boundary events. It corresponds in our case to the maximum electron drift time within the TPC (∼5ms). The default time slice duration is 1 second, meaning that we will have 0.5% duplicate analyzed events in that overlap window.&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
THIS FIG shows the run time segmentation (abscissa). Each segment is processed by a different TSP. The total number of TSPs must be greater than the average time (in seconds) it takes to process 1 second of data.&lt;br /&gt;
The large number of PDUs (Photo Detector Units, ie. frontend electronics) or channels implies that multiple digitizers are at work. Therefore the time segmentation mechanism requires the transmission of a Time Slice Marker (TSM) to all the digitizers in order to ensure a proper segment assembly based on the Time Slice number. The readout of the individual waveform digitizer (WFD) is performed by a dedicated processor Front-End Processor (FEP). For similar processing power issues as for the TSPs, the FEP will handle a subset of WFDs (2), meaning that in our case, 24 FEPs will collect all the digitizer data. Each FEP will have to read out, filter, and assemble the data fragments from the WFDs covering the predefined time slice duration.&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
The management of the transmission of the data segment to individual TSPs is left to the Pool Manager (PM)&lt;br /&gt;
application. Its role is to receive ”idle” notification from any TSPs (once the previous time slice analysis has been completed) and broadcast to all the FEPs the destination address for the upcoming segment to the next available idle TSP.&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
In order to ensure a proper Time Slice synchronization, a &amp;quot;Time Slice Marker&amp;quot; (TSM) is inserted at the WFDs level under the form of a bit. The frequency of the TSM defines the Time Slice Duration. For each TSM trigger, a WFD event is always produced and therefore will appear in the data stream at the FEP collector. The TSM event is shown in the figure below in orange. While the WFD acquisition is asynchronous due to the randomness of the event generation at the WFD level, the TSM is meant to sort the data across a given FEP based on the Time Slice number. An extra intermediate stage of data filtering or data reduction can be implemented between the Acquisition thread and the sorting thread. The Time Slice sorted output data buffer combining all the WFD of this FEP is then available to the Transfer thread pushing the requested Time Slice data to the Time Slice Processor.&lt;br /&gt;
&lt;br /&gt;
= Links =&lt;br /&gt;
&lt;br /&gt;
* https://owl.phy.queensu.ca/DS20k/TWiki/bin/view/Main/DaqPage&lt;br /&gt;
* https://dsvslice.triumf.ca&lt;br /&gt;
* [[DS-DM]] VME DS-DM board DarkSide GDM and CDM&lt;/div&gt;</summary>
		<author><name>Pierre</name></author>
	</entry>
	<entry>
		<id>https://daq00.triumf.ca/DaqWiki/index.php?title=DarkSide&amp;diff=7042</id>
		<title>DarkSide</title>
		<link rel="alternate" type="text/html" href="https://daq00.triumf.ca/DaqWiki/index.php?title=DarkSide&amp;diff=7042"/>
		<updated>2023-02-28T17:41:15Z</updated>

		<summary type="html">&lt;p&gt;Pierre: /* DarkSide DAQ */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;= DarkSide DAQ =&lt;br /&gt;
&lt;br /&gt;
The DarkSide-20k data acquisition is to operate in a triggerless mode. This means that every photodetection unit (PDU) produces a data flow independently from its neighbours and no global decision is invoked for requesting data. Also, the experiment is composed of several thousand channels that need to be processed together in order to apply data filtering and/or data reduction before the final data recording to a storage device. The analysis time for a such large number of channels requires substantial computer processing power. The Time Slice concept is to divide the acquisition time into segments and submit them individually to a pool of Time Slice Processors (TSP). Based on the duration of the time segment, the analysis performance, and the processing power of the TSPs, an adequate number of them will be able to handle the continuous data stream from all the detectors.&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
The Time Slice concept is to segment the data-taking period across all the acquisition modules. The collected data for each segment is then presented to a TSP for processing. Once the analysis is complete, the TSP informs an independent application of its availability to process a new Time Slice.&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
Physics events happening across two consecutive Time slices is to be managed properly as the TSPs will not have access to the previous time slice. This is addressed by duplicating a fraction of the time slice to the next TSP. This overlapping time is to ensure that this extended segment covers the possible boundary events. It corresponds in our case to the maximum electron drift time within the TPC (∼5ms). The default time slice duration is 1 second, meaning that we will have 0.5% duplicate analyzed events in that overlap window.&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
THIS FIG shows the run time segmentation (abscissa). Each segment is processed by a different TSP. The total number of TSPs must be greater than the average time (in seconds) it takes to process 1 second of data.&lt;br /&gt;
The large number of PDUs (Photo Detector Units, ie. frontend electronics) or channels implies that multiple digitizers are at work. Therefore the time segmentation mechanism requires the transmission of a Time Slice Marker (TSM) to all the digitizers in order to ensure a proper segment assembly based on the Time Slice number. The readout of the individual waveform digitizer (WFD) is performed by a dedicated processor Front-End Processor (FEP). For similar processing power issues as for the TSPs, the FEP will handle a subset of WFDs (2), meaning that in our case, 24 FEPs will collect all the digitizer data. Each FEP will have to read out, filter, and assemble the data fragments from the WFDs covering the predefined time slice duration.&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
The management of the transmission of the data segment to individual TSPs is left to the Pool Manager (PM)&lt;br /&gt;
application. Its role is to receive ”idle” notification from any TSPs (once the previous time slice analysis has been completed) and broadcast to all the FEPs the destination address for the upcoming segment to the next available idle TSP.&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
In order to ensure a proper Time Slice synchronization, a &amp;quot;Time Slice Marker&amp;quot; (TSM) is inserted at the WFDs level under the form of a bit. The frequency of the TSM defines the Time Slice Duration. For each TSM trigger, a WFD event is always produced and therefore will appear in the data stream at the FEP collector. The TSM event is shown in the figure below in orange. While the WFD acquisition is asynchronous due to the randomness of the event generation at the WFD level, the TSM is meant to sort the data across a given FEP based on the Time Slice number. An extra intermediate stage of data filtering or data reduction can be implemented between the Acquisition thread and the sorting thread. The Time Slice sorted output data buffer combining all the WFD of this FEP is then available to the Transfer thread pushing the requested Time Slice data to the Time Slice Processor.&lt;br /&gt;
&lt;br /&gt;
= Links =&lt;br /&gt;
&lt;br /&gt;
* https://owl.phy.queensu.ca/DS20k/TWiki/bin/view/Main/DaqPage&lt;br /&gt;
* https://dsvslice.triumf.ca&lt;br /&gt;
* [[DS-DM]] VME DS-DM board DarkSide GDM and CDM&lt;/div&gt;</summary>
		<author><name>Pierre</name></author>
	</entry>
	<entry>
		<id>https://daq00.triumf.ca/DaqWiki/index.php?title=DarkSide&amp;diff=7041</id>
		<title>DarkSide</title>
		<link rel="alternate" type="text/html" href="https://daq00.triumf.ca/DaqWiki/index.php?title=DarkSide&amp;diff=7041"/>
		<updated>2023-02-28T17:30:41Z</updated>

		<summary type="html">&lt;p&gt;Pierre: &lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;= DarkSide DAQ =&lt;br /&gt;
&lt;br /&gt;
The DarkSide-20k data acquisition is to operate in a triggerless mode. Meaning that every photodetection unit&lt;br /&gt;
(PDU) produces a data flow independently from its neighbours and no global decision is invoked for requesting data.&lt;br /&gt;
Also, the experiment is composed of several thousand channels that need to be processed together in order to apply&lt;br /&gt;
data filtering and/or data reduction before the final data recording to a storage device. The analysis time for a such&lt;br /&gt;
large number of channels requires substantial computer processing power. The Time Slice concept is to divide the&lt;br /&gt;
acquisition time into segments and submit them individually to a dedicated processor. Based on the duration of the&lt;br /&gt;
time segment, the analysis performance, and the processing power of the Time Slice Processor (TSP), an adequate&lt;br /&gt;
number of TSPs will be able to handle the continuous data stream from all the detectors.&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
The Time Slice concept is to segment the data-taking period across all the acquisition modules. The collected data&lt;br /&gt;
for each segment is then presented to a TSP for processing. Once the analysis is complete, the TSP informs an&lt;br /&gt;
independent application of its availability to process a new Time Slice.&lt;br /&gt;
Physics events happening across two consecutive Time slices is to be managed properly as the TSPs will not have&lt;br /&gt;
access to the previous one. This is addressed by duplicating a fraction of the time slice to the next TSP. This&lt;br /&gt;
overlapping time is to ensure that this extended segment covers the possible boundary events. It corresponds in our&lt;br /&gt;
case to the maximum electron drift time within the TPC (∼5ms). The default time slice duration is 1 second, meaning&lt;br /&gt;
that we will have 0.5% duplicate analyzed events in that overlap window.&lt;br /&gt;
Fig. 3 shows the run time segmentation (abscissa). Each segment is processed by a different TSP. The total number&lt;br /&gt;
of TSPs must be greater than the average time (in seconds) it takes to process 1 second of data.&lt;br /&gt;
A large number of PDMs implies that multiple digitizers are at work. Therefore the time segmentation mechanism&lt;br /&gt;
requires the transmission of a Time Slice Marker (TSM) to all the digitizers in order to ensure a proper segment&lt;br /&gt;
assembly based on the Time Slice number. The readout of the individual waveform digitizer (WFD) is performed by&lt;br /&gt;
a dedicated processor Front-End Processor (FEP). For similar processing power issues as for the TSPs, the FEP will&lt;br /&gt;
handle a subset of WFDs (2), meaning that in our case, 24 FEPs will collect all the digitizer data. Each FEP will&lt;br /&gt;
have to read out, filter, and assemble the data segments from the WFDs covering the predefined time slice duration.&lt;br /&gt;
The management of the transmission of the data fragment to individual TSPs is left to the Pool Manager (PM)&lt;br /&gt;
application. Its role is to receive ”idle” notification from any TSPs (once the previous time slice analysis has been&lt;br /&gt;
completed) and broadcast to all the FEPs the destination address for the upcoming segment to the next available idle&lt;br /&gt;
TSP&lt;br /&gt;
&lt;br /&gt;
= Links =&lt;br /&gt;
&lt;br /&gt;
* https://owl.phy.queensu.ca/DS20k/TWiki/bin/view/Main/DaqPage&lt;br /&gt;
* https://dsvslice.triumf.ca&lt;br /&gt;
* [[DS-DM]] VME DS-DM board DarkSide GDM and CDM&lt;/div&gt;</summary>
		<author><name>Pierre</name></author>
	</entry>
	<entry>
		<id>https://daq00.triumf.ca/DaqWiki/index.php?title=DarkSide&amp;diff=7040</id>
		<title>DarkSide</title>
		<link rel="alternate" type="text/html" href="https://daq00.triumf.ca/DaqWiki/index.php?title=DarkSide&amp;diff=7040"/>
		<updated>2023-02-20T20:51:06Z</updated>

		<summary type="html">&lt;p&gt;Pierre: /* Links */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;= DarkSide =&lt;br /&gt;
&lt;br /&gt;
The DarkSide-20k data acquisition is to operate in a triggerless mode. Meaning that every photodetection unit&lt;br /&gt;
(PDU) produces a data flow independently from its neighbours and no global decision is invoked for requesting data.&lt;br /&gt;
Also, the experiment is composed of several thousand channels that need to be processed together in order to apply&lt;br /&gt;
data filtering and/or data reduction before the final data recording to a storage device. The analysis time for a such&lt;br /&gt;
large number of channels requires substantial computer processing power. The Time Slice concept is to divide the&lt;br /&gt;
acquisition time into segments and submit them individually to a dedicated processor. Based on the duration of the&lt;br /&gt;
time segment, the analysis performance, and the processing power of the Time Slice Processor (TSP), an adequate&lt;br /&gt;
number of TSPs will be able to handle the continuous data stream from all the detectors.&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
The Time Slice concept is to segment the data-taking period across all the acquisition modules. The collected data&lt;br /&gt;
for each segment is then presented to a TSP for processing. Once the analysis is complete, the TSP informs an&lt;br /&gt;
independent application of its availability to process a new Time Slice.&lt;br /&gt;
Physics events happening across two consecutive Time slices is to be managed properly as the TSPs will not have&lt;br /&gt;
access to the previous one. This is addressed by duplicating a fraction of the time slice to the next TSP. This&lt;br /&gt;
overlapping time is to ensure that this extended segment covers the possible boundary events. It corresponds in our&lt;br /&gt;
case to the maximum electron drift time within the TPC (∼5ms). The default time slice duration is 1 second, meaning&lt;br /&gt;
that we will have 0.5% duplicate analyzed events in that overlap window.&lt;br /&gt;
Fig. 3 shows the run time segmentation (abscissa). Each segment is processed by a different TSP. The total number&lt;br /&gt;
of TSPs must be greater than the average time (in seconds) it takes to process 1 second of data.&lt;br /&gt;
A large number of PDMs implies that multiple digitizers are at work. Therefore the time segmentation mechanism&lt;br /&gt;
requires the transmission of a Time Slice Marker (TSM) to all the digitizers in order to ensure a proper segment&lt;br /&gt;
assembly based on the Time Slice number. The readout of the individual waveform digitizer (WFD) is performed by&lt;br /&gt;
a dedicated processor Front-End Processor (FEP). For similar processing power issues as for the TSPs, the FEP will&lt;br /&gt;
handle a subset of WFDs (2), meaning that in our case, 24 FEPs will collect all the digitizer data. Each FEP will&lt;br /&gt;
have to read out, filter, and assemble the data segments from the WFDs covering the predefined time slice duration.&lt;br /&gt;
The management of the transmission of the data fragment to individual TSPs is left to the Pool Manager (PM)&lt;br /&gt;
application. Its role is to receive ”idle” notification from any TSPs (once the previous time slice analysis has been&lt;br /&gt;
completed) and broadcast to all the FEPs the destination address for the upcoming segment to the next available idle&lt;br /&gt;
TSP&lt;br /&gt;
&lt;br /&gt;
= Links =&lt;br /&gt;
&lt;br /&gt;
* https://owl.phy.queensu.ca/DS20k/TWiki/bin/view/Main/DaqPage&lt;br /&gt;
* https://dsvslice.triumf.ca&lt;br /&gt;
* [[DS-DM]] VME DS-DM board DarkSide GDM and CDM&lt;/div&gt;</summary>
		<author><name>Pierre</name></author>
	</entry>
	<entry>
		<id>https://daq00.triumf.ca/DaqWiki/index.php?title=DarkSide&amp;diff=7039</id>
		<title>DarkSide</title>
		<link rel="alternate" type="text/html" href="https://daq00.triumf.ca/DaqWiki/index.php?title=DarkSide&amp;diff=7039"/>
		<updated>2023-02-20T20:50:30Z</updated>

		<summary type="html">&lt;p&gt;Pierre: /* Links */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;= DarkSide =&lt;br /&gt;
&lt;br /&gt;
The DarkSide-20k data acquisition is to operate in a triggerless mode. Meaning that every photodetection unit&lt;br /&gt;
(PDU) produces a data flow independently from its neighbours and no global decision is invoked for requesting data.&lt;br /&gt;
Also, the experiment is composed of several thousand channels that need to be processed together in order to apply&lt;br /&gt;
data filtering and/or data reduction before the final data recording to a storage device. The analysis time for a such&lt;br /&gt;
large number of channels requires substantial computer processing power. The Time Slice concept is to divide the&lt;br /&gt;
acquisition time into segments and submit them individually to a dedicated processor. Based on the duration of the&lt;br /&gt;
time segment, the analysis performance, and the processing power of the Time Slice Processor (TSP), an adequate&lt;br /&gt;
number of TSPs will be able to handle the continuous data stream from all the detectors.&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
The Time Slice concept is to segment the data-taking period across all the acquisition modules. The collected data&lt;br /&gt;
for each segment is then presented to a TSP for processing. Once the analysis is complete, the TSP informs an&lt;br /&gt;
independent application of its availability to process a new Time Slice.&lt;br /&gt;
Physics events happening across two consecutive Time slices is to be managed properly as the TSPs will not have&lt;br /&gt;
access to the previous one. This is addressed by duplicating a fraction of the time slice to the next TSP. This&lt;br /&gt;
overlapping time is to ensure that this extended segment covers the possible boundary events. It corresponds in our&lt;br /&gt;
case to the maximum electron drift time within the TPC (∼5ms). The default time slice duration is 1 second, meaning&lt;br /&gt;
that we will have 0.5% duplicate analyzed events in that overlap window.&lt;br /&gt;
Fig. 3 shows the run time segmentation (abscissa). Each segment is processed by a different TSP. The total number&lt;br /&gt;
of TSPs must be greater than the average time (in seconds) it takes to process 1 second of data.&lt;br /&gt;
A large number of PDMs implies that multiple digitizers are at work. Therefore the time segmentation mechanism&lt;br /&gt;
requires the transmission of a Time Slice Marker (TSM) to all the digitizers in order to ensure a proper segment&lt;br /&gt;
assembly based on the Time Slice number. The readout of the individual waveform digitizer (WFD) is performed by&lt;br /&gt;
a dedicated processor Front-End Processor (FEP). For similar processing power issues as for the TSPs, the FEP will&lt;br /&gt;
handle a subset of WFDs (2), meaning that in our case, 24 FEPs will collect all the digitizer data. Each FEP will&lt;br /&gt;
have to read out, filter, and assemble the data segments from the WFDs covering the predefined time slice duration.&lt;br /&gt;
The management of the transmission of the data fragment to individual TSPs is left to the Pool Manager (PM)&lt;br /&gt;
application. Its role is to receive ”idle” notification from any TSPs (once the previous time slice analysis has been&lt;br /&gt;
completed) and broadcast to all the FEPs the destination address for the upcoming segment to the next available idle&lt;br /&gt;
TSP&lt;br /&gt;
&lt;br /&gt;
= Links =&lt;br /&gt;
&lt;br /&gt;
* [[Queens TWiki]] https://owl.phy.queensu.ca/DS20k/TWiki/bin/view/Main/DaqPage&lt;br /&gt;
* [[Triumf Vertical Slice ]] https://dsvslice.triumf.ca&lt;br /&gt;
* [[DS-DM]] VME DS-DM board DarkSide GDM and CDM&lt;/div&gt;</summary>
		<author><name>Pierre</name></author>
	</entry>
	<entry>
		<id>https://daq00.triumf.ca/DaqWiki/index.php?title=DarkSide&amp;diff=7038</id>
		<title>DarkSide</title>
		<link rel="alternate" type="text/html" href="https://daq00.triumf.ca/DaqWiki/index.php?title=DarkSide&amp;diff=7038"/>
		<updated>2023-02-20T20:32:06Z</updated>

		<summary type="html">&lt;p&gt;Pierre: /* DarkSide */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;= DarkSide =&lt;br /&gt;
&lt;br /&gt;
The DarkSide-20k data acquisition is to operate in a triggerless mode. Meaning that every photodetection unit&lt;br /&gt;
(PDU) produces a data flow independently from its neighbours and no global decision is invoked for requesting data.&lt;br /&gt;
Also, the experiment is composed of several thousand channels that need to be processed together in order to apply&lt;br /&gt;
data filtering and/or data reduction before the final data recording to a storage device. The analysis time for a such&lt;br /&gt;
large number of channels requires substantial computer processing power. The Time Slice concept is to divide the&lt;br /&gt;
acquisition time into segments and submit them individually to a dedicated processor. Based on the duration of the&lt;br /&gt;
time segment, the analysis performance, and the processing power of the Time Slice Processor (TSP), an adequate&lt;br /&gt;
number of TSPs will be able to handle the continuous data stream from all the detectors.&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
The Time Slice concept is to segment the data-taking period across all the acquisition modules. The collected data&lt;br /&gt;
for each segment is then presented to a TSP for processing. Once the analysis is complete, the TSP informs an&lt;br /&gt;
independent application of its availability to process a new Time Slice.&lt;br /&gt;
Physics events happening across two consecutive Time slices is to be managed properly as the TSPs will not have&lt;br /&gt;
access to the previous one. This is addressed by duplicating a fraction of the time slice to the next TSP. This&lt;br /&gt;
overlapping time is to ensure that this extended segment covers the possible boundary events. It corresponds in our&lt;br /&gt;
case to the maximum electron drift time within the TPC (∼5ms). The default time slice duration is 1 second, meaning&lt;br /&gt;
that we will have 0.5% duplicate analyzed events in that overlap window.&lt;br /&gt;
Fig. 3 shows the run time segmentation (abscissa). Each segment is processed by a different TSP. The total number&lt;br /&gt;
of TSPs must be greater than the average time (in seconds) it takes to process 1 second of data.&lt;br /&gt;
A large number of PDMs implies that multiple digitizers are at work. Therefore the time segmentation mechanism&lt;br /&gt;
requires the transmission of a Time Slice Marker (TSM) to all the digitizers in order to ensure a proper segment&lt;br /&gt;
assembly based on the Time Slice number. The readout of the individual waveform digitizer (WFD) is performed by&lt;br /&gt;
a dedicated processor Front-End Processor (FEP). For similar processing power issues as for the TSPs, the FEP will&lt;br /&gt;
handle a subset of WFDs (2), meaning that in our case, 24 FEPs will collect all the digitizer data. Each FEP will&lt;br /&gt;
have to read out, filter, and assemble the data segments from the WFDs covering the predefined time slice duration.&lt;br /&gt;
The management of the transmission of the data fragment to individual TSPs is left to the Pool Manager (PM)&lt;br /&gt;
application. Its role is to receive ”idle” notification from any TSPs (once the previous time slice analysis has been&lt;br /&gt;
completed) and broadcast to all the FEPs the destination address for the upcoming segment to the next available idle&lt;br /&gt;
TSP&lt;br /&gt;
&lt;br /&gt;
= Links =&lt;br /&gt;
&lt;br /&gt;
* https://dsvslice.triumf.ca&lt;br /&gt;
* [[DS-DM]] VME DS-DM board DarkSide GDM and CDM&lt;/div&gt;</summary>
		<author><name>Pierre</name></author>
	</entry>
	<entry>
		<id>https://daq00.triumf.ca/DaqWiki/index.php?title=DarkSide&amp;diff=7037</id>
		<title>DarkSide</title>
		<link rel="alternate" type="text/html" href="https://daq00.triumf.ca/DaqWiki/index.php?title=DarkSide&amp;diff=7037"/>
		<updated>2023-02-20T18:45:04Z</updated>

		<summary type="html">&lt;p&gt;Pierre: /* DarkSide */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;= DarkSide =&lt;br /&gt;
&lt;br /&gt;
The DarkSide-20k data acquisition is to operate in a triggerless mode. Meaning that every photodetection unit&lt;br /&gt;
(PDU) produces a data flow independently from its neighbours and no global decision is invoked for requesting data.&lt;br /&gt;
Also, the experiment is composed of several thousand channels that need to be processed together in order to apply&lt;br /&gt;
data filtering and/or data reduction before the final data recording to a storage device. The analysis time for a such&lt;br /&gt;
large number of channels requires substantial computer processing power. The Time Slice concept is to divide the&lt;br /&gt;
acquisition time into segments and submit them individually to a dedicated processor. Based on the duration of the&lt;br /&gt;
time segment, the analysis performance, and the processing power of the Time Slice Processor (TSP), an adequate&lt;br /&gt;
number of TSPs will be able to handle the continuous data stream from all the detectors.&lt;br /&gt;
The Time Slice concept is to segment the data-taking period across all the acquisition modules. The collected data&lt;br /&gt;
for each segment is then presented to a TSP for processing. Once the analysis is complete, the TSP informs an&lt;br /&gt;
independent application of its availability to process a new Time Slice.&lt;br /&gt;
Physics events happening across two consecutive Time slices is to be managed properly as the TSPs will not have&lt;br /&gt;
access to the previous one. This is addressed by duplicating a fraction of the time slice to the next TSP. This&lt;br /&gt;
overlapping time is to ensure that this extended segment covers the possible boundary events. It corresponds in our&lt;br /&gt;
case to the maximum electron drift time within the TPC (∼5ms). The default time slice duration is 1 second, meaning&lt;br /&gt;
that we will have 0.5% duplicate analyzed events in that overlap window.&lt;br /&gt;
Fig. 3 shows the run time segmentation (abscissa). Each segment is processed by a different TSP. The total number&lt;br /&gt;
of TSPs must be greater than the average time (in seconds) it takes to process 1 second of data.&lt;br /&gt;
A large number of PDMs implies that multiple digitizers are at work. Therefore the time segmentation mechanism&lt;br /&gt;
requires the transmission of a Time Slice Marker (TSM) to all the digitizers in order to ensure a proper segment&lt;br /&gt;
assembly based on the Time Slice number. The readout of the individual waveform digitizer (WFD) is performed by&lt;br /&gt;
a dedicated processor Front-End Processor (FEP). For similar processing power issues as for the TSPs, the FEP will&lt;br /&gt;
handle a subset of WFDs (2), meaning that in our case, 24 FEPs will collect all the digitizer data. Each FEP will&lt;br /&gt;
have to read out, filter, and assemble the data segments from the WFDs covering the predefined time slice duration.&lt;br /&gt;
The management of the transmission of the data fragment to individual TSPs is left to the Pool Manager (PM)&lt;br /&gt;
application. Its role is to receive ”idle” notification from any TSPs (once the previous time slice analysis has been&lt;br /&gt;
completed) and broadcast to all the FEPs the destination address for the upcoming segment to the next available idle&lt;br /&gt;
TSP&lt;br /&gt;
&lt;br /&gt;
= Links =&lt;br /&gt;
&lt;br /&gt;
* https://dsvslice.triumf.ca&lt;br /&gt;
* [[DS-DM]] VME DS-DM board DarkSide GDM and CDM&lt;/div&gt;</summary>
		<author><name>Pierre</name></author>
	</entry>
	<entry>
		<id>https://daq00.triumf.ca/DaqWiki/index.php?title=Experiments&amp;diff=5553</id>
		<title>Experiments</title>
		<link rel="alternate" type="text/html" href="https://daq00.triumf.ca/DaqWiki/index.php?title=Experiments&amp;diff=5553"/>
		<updated>2022-02-11T00:49:20Z</updated>

		<summary type="html">&lt;p&gt;Pierre: &lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;Onsite experiments:&lt;br /&gt;
&lt;br /&gt;
* [[EMMA]]&lt;br /&gt;
* [[IRIS]]&lt;br /&gt;
* [[TIGRESS]] (GRS/TIGRESS/GRIFFIN/8PI)&lt;br /&gt;
&lt;br /&gt;
Offsite experiments:&lt;br /&gt;
&lt;br /&gt;
* [[Alpha-g]]&lt;br /&gt;
* [[https://owl.phy.queensu.ca/DS20k/TWiki/bin/view/Main/DaqPage DarSide]]&lt;/div&gt;</summary>
		<author><name>Pierre</name></author>
	</entry>
	<entry>
		<id>https://daq00.triumf.ca/DaqWiki/index.php?title=Experiments&amp;diff=5552</id>
		<title>Experiments</title>
		<link rel="alternate" type="text/html" href="https://daq00.triumf.ca/DaqWiki/index.php?title=Experiments&amp;diff=5552"/>
		<updated>2022-02-11T00:48:37Z</updated>

		<summary type="html">&lt;p&gt;Pierre: &lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;Onsite experiments:&lt;br /&gt;
&lt;br /&gt;
* [[EMMA]]&lt;br /&gt;
* [[IRIS]]&lt;br /&gt;
* [[TIGRESS]] (GRS/TIGRESS/GRIFFIN/8PI)&lt;br /&gt;
&lt;br /&gt;
Offsite experiments:&lt;br /&gt;
&lt;br /&gt;
* [[Alpha-g]]&lt;br /&gt;
* [[DarSide]] https://owl.phy.queensu.ca/DS20k/TWiki/bin/view/Main/DaqPage&lt;/div&gt;</summary>
		<author><name>Pierre</name></author>
	</entry>
	<entry>
		<id>https://daq00.triumf.ca/DaqWiki/index.php?title=File:Web_security2.svg&amp;diff=339</id>
		<title>File:Web security2.svg</title>
		<link rel="alternate" type="text/html" href="https://daq00.triumf.ca/DaqWiki/index.php?title=File:Web_security2.svg&amp;diff=339"/>
		<updated>2015-05-08T17:00:20Z</updated>

		<summary type="html">&lt;p&gt;Pierre: Pierre uploaded a new version of File:Web security2.svg&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;&lt;/div&gt;</summary>
		<author><name>Pierre</name></author>
	</entry>
	<entry>
		<id>https://daq00.triumf.ca/DaqWiki/index.php?title=File:Web_security2.svg&amp;diff=338</id>
		<title>File:Web security2.svg</title>
		<link rel="alternate" type="text/html" href="https://daq00.triumf.ca/DaqWiki/index.php?title=File:Web_security2.svg&amp;diff=338"/>
		<updated>2015-05-08T16:48:54Z</updated>

		<summary type="html">&lt;p&gt;Pierre: Pierre uploaded a new version of File:Web security2.svg&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;&lt;/div&gt;</summary>
		<author><name>Pierre</name></author>
	</entry>
</feed>