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Olchansk — Wed, 01 Apr 2026 23:50:34 GMT

← Older revision		Revision as of 23:50, 1 April 2026
(3 intermediate revisions by the same user not shown)
Line 2,413:		Line 2,413:
	66 \| same \| CDM \| RO \| ports 8, 9		66 \| same \| CDM \| RO \| ports 8, 9
	67 \| same \| CDM \| RO \| ports 10, 11		67 \| same \| CDM \| RO \| ports 10, 11
			62 \| 0x20260401 \| CDM \| ROL \| vx_rx_hitmap_period latched by cmd_latch, VX ports 0, 1
			63 \| same \| CDM \| ROL \| ports 2, 3
			64 \| same \| CDM \| ROL \| ports 4, 5
			65 \| same \| CDM \| ROL \| ports 6, 7
			66 \| same \| CDM \| ROL \| ports 8, 9
			67 \| same \| CDM \| ROL \| ports 10, 11
	68 \| 0x20240814 \| ALL \| RW \| GPS control and status		68 \| 0x20240814 \| ALL \| RW \| GPS control and status
	69 \| 0x20241104 \| CDM \| ROLB \| vx_tx_trg_packet_counter \| counter of TRG packets CDM->VX		69 \| 0x20241104 \| CDM \| ROLB \| vx_tx_trg_packet_counter \| counter of TRG packets CDM->VX
Line 2,444:		Line 2,450:
	100,101 \| 0x20251008 \| CDM \| ROL \| vx_lvds_rx_trig48_{data,bitmap48}_latched \| VX LVDS TRIG48 packet first 32 bits, bitmap48 first 32 bits		100,101 \| 0x20251008 \| CDM \| ROL \| vx_lvds_rx_trig48_{data,bitmap48}_latched \| VX LVDS TRIG48 packet first 32 bits, bitmap48 first 32 bits
	102 \| 0x20251008 \| ALL \| RO \| cmd_counter \| counter of reg0 commands		102 \| 0x20251008 \| ALL \| RO \| cmd_counter \| counter of reg0 commands
			103,104,105 \| 0x20260401 \| CDM \| ROL \| vx_rx_hitmap_vx_id_latched \| VX ID from VX hitmap packets, VX ports 0..11, in order, latched by cmd_latch
			106 \| 0x20260401 \| CDM \| RW \| conf_vx_rx_hitmap_cumulative_period \| period of CDM CUMULATIVE_HITMAP packets, set to 0 to disable them.
	</pre>		</pre>

Line 3,241:		Line 3,249:
	cdm_hitmap_fifo_full_latch, // 16		cdm_hitmap_fifo_full_latch, // 16
	1'b0, // 15		1'b0, // 15
	~~1'b0~~, // 14		vx_rx_hitmap_error_latch, // 14
	~~1'b0~~, // 13		hitmap_encode_error_latch, // 13
	gdm_trig48_encode_error_latch, // 12		gdm_trig48_encode_error_latch, // 12
	1'b0, // vx_tx_trig48_pkt8_error_latch, // 11		1'b0, // vx_tx_trig48_pkt8_error_latch, // 11
Line 3,253:		Line 3,261:
	cdm_busy_encode_error_latch, // 4		cdm_busy_encode_error_latch, // 4
	cdm_hitmap_encode_error_latch, // 3		cdm_hitmap_encode_error_latch, // 3
	~~vx_rx_hitmap_error_latch~~, // 2		cdm_hitmap_decode_error_latch, // 2
	1'b0, // vx_tx_tsm_pkt8_error_latch, // 1		1'b0, // vx_tx_tsm_pkt8_error_latch, // 1
	1'b0, // vx_tx_trg_pkt8_error_latch // 0		1'b0, // vx_tx_trg_pkt8_error_latch // 0
Line 3,487:		Line 3,495:
	0x84 - 12 bytes - 6 words - 3 dwords - 2 qwords - GDM_BUSY packet		0x84 - 12 bytes - 6 words - 3 dwords - 2 qwords - GDM_BUSY packet
	0x85 - 12 bytes - 6 words - 3 dwords - 1 qwords - GDM_HITMAP packet		0x85 - 12 bytes - 6 words - 3 dwords - 1 qwords - GDM_HITMAP packet
			0x86 - 128 bytes - 64 words - 32 dwords - 16 qwords - CDM CUMULATIVE_HITMAP packet
	</pre>		</pre>
	* 0x02 - TRG packet, 8 bytes, 80 adc clocks, 640 ns on lvds link		* 0x02 - TRG packet, 8 bytes, 80 adc clocks, 640 ns on lvds link
Line 3,618:		Line 3,627:
	10 - hitmap_grand_or_12[7:0]		10 - hitmap_grand_or_12[7:0]
	11 - {hitmap_grand_or,0,0,0,hitmap_grand_or_12[11:8]}		11 - {hitmap_grand_or,0,0,0,hitmap_grand_or_12[11:8]}
			</pre>
			* 0x86 - CDM cumulative hitmap packet, 128 bytes, not sent on lvds link, not sent on fiber link
			<pre>
			0 - 0x86
			1 - vx_rx_hitmap_packet_counter[7:0], reset at begin of run
			2 - ts64 byte 0
			3 - ts64 byte 1
			4 - ts64 byte 2
			5 - ts64 byte 3
			6 - ts64 byte 4
			7 - ts64 byte 5
			8 - ts64 byte 6
			9 - ts64 byte 7
			10 - reserved
			11 - reserved
			12 - repeating 12 times the 80-bit VX HITMAP packets: 0x81, VX ID, 64 bits of hitmap
	</pre>		</pre>

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