Cathode Pad Electronics: Difference between revisions
Jump to navigation
Jump to search
No edit summary |
|||
| Line 2: | Line 2: | ||
=== Reference === | === Reference === | ||
[[File:AFTER_MANUAL_v2.pdf| After manual]] | [[File:AFTER_MANUAL_v2.pdf | After manual]] | ||
Revision as of 10:34, 4 May 2017
The cathode pads are read-out by AFTER ASIC which diagram is presented Figure 9Figure 9. One chip has 72 active channels and 4 reference channels for pedestal subtraction. Each channel consists of charge-sensitive preamplifier, pole-zero cancellation of preamplifier decay time, RC2 shaper and 512-cell SCA to store waveform. Amplifier gain, pole-zero time constant and shaping time are programmable.