DL-TDC: Difference between revisions

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20.847   0.400 RR CELL 1 LABCELL_X88_Y11_N0 TDC6_inst|a|tdc|le|phase|d|inst9|combout 83
20.847   0.400 RR CELL 1 LABCELL_X88_Y11_N0 TDC6_inst|a|tdc|le|phase|d|inst9|combout 83
21.108   0.261 RR CELL 1 FF_X88_Y11_N2 TDC6:TDC6_inst|TDC2ef:a|TDC2e:tdc|TDC1:le|TDClcell40:phase|TDClcell10:d|latch[9] 84
21.108   0.261 RR CELL 1 FF_X88_Y11_N2 TDC6:TDC6_inst|TDC2ef:a|TDC2e:tdc|TDC1:le|TDClcell40:phase|TDClcell10:d|latch[9] 84
tdc6g.pdf
min bin: 0.021 0.016 0.031 0.030 ns, max bin: 0.484 0.612 0.872 1.171 ns, max phase 38 36 33 33
min bin: 0.016 0.074 0.009 0.130 ns, max bin: 0.857 0.727 0.622 0.782 ns, max phase 33 30 38 35
</pre>
</pre>

Revision as of 06:02, 12 February 2023

DL-TDC DarkLight FPGA TDC

Cyclone-1

report_path -to [get_keepers {TDC6:tdc|TDC2ef:a|TDC2e:tdc|TDC1:le|TDClcell40:phase|TDClcell10:d|latch[9]}] -npaths 1 -panel_name {Report Path}

tdc6g.pdf
min bin: 0.003 0.108 0.047 0.086 ns, max bin: 0.769 0.845 0.700 0.709 ns, max phase 31 30 32 30
min bin: 0.167 0.091 0.058 0.099 ns, max bin: 0.821 0.935 0.636 0.729 ns, max phase 29 25 31 29

tdc6h.pdf
min bin: 0.021 0.090 0.130 0.076 ns, max bin: 0.863 0.868 0.731 0.686 ns, max phase 33 32 33 32
min bin: 0.079 0.069 0.021 0.119 ns, max bin: 0.812 0.871 0.818 0.845 ns, max phase 33 32 31 30

with set_max_delay -to {TDC6:tdc|TDC2ef:*|TDC2e:tdc|TDC1:*|TDClcell40:phase|TDClcell10:d|latch[9]} 10.0
13.237 ns
13.237	13.237					data path	1
0.000	  0.000			1	LC_X3_Y17_N0	TS_DFF[0]	1
0.000	  0.000	RR	CELL	10	LC_X3_Y17_N0	TS_DFF[0]|regout	2
1.285	  1.285	RR	IC	2	LC_X8_Y13_N0	tdc|a|tdc|le|phase|a|latch[0]|datad	3
1.373	  0.088	RR	CELL	1	LC_X8_Y13_N0	tdc|a|tdc|le|phase|a|latch[0]|combout	4
1.513	  0.140	RR	IC	2	LC_X8_Y13_N1	tdc|a|tdc|le|phase|a|latch[1]|datad	5
1.601	  0.088	RR	CELL	1	LC_X8_Y13_N1	tdc|a|tdc|le|phase|a|latch[1]|combout	6
1.741	  0.140	RR	IC	2	LC_X8_Y13_N2	tdc|a|tdc|le|phase|a|latch[2]|datad	7
1.829	  0.088	RR	CELL	1	LC_X8_Y13_N2	tdc|a|tdc|le|phase|a|latch[2]|combout	8
1.969	  0.140	RR	IC	2	LC_X8_Y13_N3	tdc|a|tdc|le|phase|a|latch[3]|datad	9
2.057	  0.088	RR	CELL	1	LC_X8_Y13_N3	tdc|a|tdc|le|phase|a|latch[3]|combout	10
2.197	  0.140	RR	IC	2	LC_X8_Y13_N4	tdc|a|tdc|le|phase|a|latch[4]|datad	11
2.285	  0.088	RR	CELL	1	LC_X8_Y13_N4	tdc|a|tdc|le|phase|a|latch[4]|combout	12
2.547	  0.262	RR	IC	2	LC_X8_Y13_N5	tdc|a|tdc|le|phase|a|latch[5]|datad	13
2.635	  0.088	RR	CELL	1	LC_X8_Y13_N5	tdc|a|tdc|le|phase|a|latch[5]|combout	14
2.775	  0.140	RR	IC	2	LC_X8_Y13_N6	tdc|a|tdc|le|phase|a|latch[6]|datad	15
2.863	  0.088	RR	CELL	1	LC_X8_Y13_N6	tdc|a|tdc|le|phase|a|latch[6]|combout	16
3.003	  0.140	RR	IC	2	LC_X8_Y13_N7	tdc|a|tdc|le|phase|a|latch[7]|datad	17
3.091	  0.088	RR	CELL	1	LC_X8_Y13_N7	tdc|a|tdc|le|phase|a|latch[7]|combout	18
3.231	  0.140	RR	IC	2	LC_X8_Y13_N8	tdc|a|tdc|le|phase|a|latch[8]|datad	19
3.319	  0.088	RR	CELL	1	LC_X8_Y13_N8	tdc|a|tdc|le|phase|a|latch[8]|combout	20
3.459	  0.140	RR	IC	2	LC_X8_Y13_N9	tdc|a|tdc|le|phase|a|latch[9]|datad	21
3.547	  0.088	RR	CELL	1	LC_X8_Y13_N9	tdc|a|tdc|le|phase|a|latch[9]|combout	22
4.074	  0.527	RR	IC	2	LC_X9_Y13_N1	tdc|a|tdc|le|phase|b|latch[0]|datad	23
4.162	  0.088	RR	CELL	1	LC_X9_Y13_N1	tdc|a|tdc|le|phase|b|latch[0]|combout	24
4.302	  0.140	RR	IC	2	LC_X9_Y13_N2	tdc|a|tdc|le|phase|b|latch[1]|datad	25
4.390	  0.088	RR	CELL	1	LC_X9_Y13_N2	tdc|a|tdc|le|phase|b|latch[1]|combout	26
4.530	  0.140	RR	IC	2	LC_X9_Y13_N3	tdc|a|tdc|le|phase|b|latch[2]|datad	27
4.618	  0.088	RR	CELL	1	LC_X9_Y13_N3	tdc|a|tdc|le|phase|b|latch[2]|combout	28
4.758	  0.140	RR	IC	2	LC_X9_Y13_N4	tdc|a|tdc|le|phase|b|latch[3]|datad	29
4.846	  0.088	RR	CELL	1	LC_X9_Y13_N4	tdc|a|tdc|le|phase|b|latch[3]|combout	30
5.108	  0.262	RR	IC	2	LC_X9_Y13_N5	tdc|a|tdc|le|phase|b|latch[4]|datad	31
5.196	  0.088	RR	CELL	1	LC_X9_Y13_N5	tdc|a|tdc|le|phase|b|latch[4]|combout	32
5.336	  0.140	RR	IC	2	LC_X9_Y13_N6	tdc|a|tdc|le|phase|b|latch[5]|datad	33
5.424	  0.088	RR	CELL	1	LC_X9_Y13_N6	tdc|a|tdc|le|phase|b|latch[5]|combout	34
5.564	  0.140	RR	IC	2	LC_X9_Y13_N7	tdc|a|tdc|le|phase|b|latch[6]|datad	35
5.652	  0.088	RR	CELL	1	LC_X9_Y13_N7	tdc|a|tdc|le|phase|b|latch[6]|combout	36
5.792	  0.140	RR	IC	2	LC_X9_Y13_N8	tdc|a|tdc|le|phase|b|latch[7]|datad	37
5.880	  0.088	RR	CELL	1	LC_X9_Y13_N8	tdc|a|tdc|le|phase|b|latch[7]|combout	38
6.218	  0.338	RR	IC	2	LC_X9_Y13_N0	tdc|a|tdc|le|phase|b|latch[8]|datac	39
6.443	  0.225	RR	CELL	1	LC_X9_Y13_N0	tdc|a|tdc|le|phase|b|latch[8]|combout	40
6.762	  0.319	RR	IC	2	LC_X9_Y13_N9	tdc|a|tdc|le|phase|b|latch[9]|datad	41
6.850	  0.088	RR	CELL	1	LC_X9_Y13_N9	tdc|a|tdc|le|phase|b|latch[9]|combout	42
7.767	  0.917	RR	IC	2	LC_X8_Y14_N0	tdc|a|tdc|le|phase|c|latch[0]|datad	43
7.855	  0.088	RR	CELL	1	LC_X8_Y14_N0	tdc|a|tdc|le|phase|c|latch[0]|combout	44
7.995	  0.140	RR	IC	2	LC_X8_Y14_N1	tdc|a|tdc|le|phase|c|latch[1]|datad	45
8.083	  0.088	RR	CELL	1	LC_X8_Y14_N1	tdc|a|tdc|le|phase|c|latch[1]|combout	46
8.223	  0.140	RR	IC	2	LC_X8_Y14_N2	tdc|a|tdc|le|phase|c|latch[2]|datad	47
8.311	  0.088	RR	CELL	1	LC_X8_Y14_N2	tdc|a|tdc|le|phase|c|latch[2]|combout	48
8.451	  0.140	RR	IC	2	LC_X8_Y14_N3	tdc|a|tdc|le|phase|c|latch[3]|datad	49
8.539	  0.088	RR	CELL	1	LC_X8_Y14_N3	tdc|a|tdc|le|phase|c|latch[3]|combout	50
8.679	  0.140	RR	IC	2	LC_X8_Y14_N4	tdc|a|tdc|le|phase|c|latch[4]|datad	51
8.767	  0.088	RR	CELL	1	LC_X8_Y14_N4	tdc|a|tdc|le|phase|c|latch[4]|combout	52
9.029	  0.262	RR	IC	2	LC_X8_Y14_N5	tdc|a|tdc|le|phase|c|latch[5]|datad	53
9.117	  0.088	RR	CELL	1	LC_X8_Y14_N5	tdc|a|tdc|le|phase|c|latch[5]|combout	54
9.257	  0.140	RR	IC	2	LC_X8_Y14_N6	tdc|a|tdc|le|phase|c|latch[6]|datad	55
9.345	  0.088	RR	CELL	1	LC_X8_Y14_N6	tdc|a|tdc|le|phase|c|latch[6]|combout	56
9.485	  0.140	RR	IC	2	LC_X8_Y14_N7	tdc|a|tdc|le|phase|c|latch[7]|datad	57
9.573	  0.088	RR	CELL	1	LC_X8_Y14_N7	tdc|a|tdc|le|phase|c|latch[7]|combout	58
9.713	  0.140	RR	IC	2	LC_X8_Y14_N8	tdc|a|tdc|le|phase|c|latch[8]|datad	59
9.801	  0.088	RR	CELL	1	LC_X8_Y14_N8	tdc|a|tdc|le|phase|c|latch[8]|combout	60
9.941	  0.140	RR	IC	2	LC_X8_Y14_N9	tdc|a|tdc|le|phase|c|latch[9]|datad	61
10.029	  0.088	RR	CELL	1	LC_X8_Y14_N9	tdc|a|tdc|le|phase|c|latch[9]|combout	62
10.551	  0.522	RR	IC	2	LC_X9_Y14_N0	tdc|a|tdc|le|phase|d|latch[0]|datad	63
10.639	  0.088	RR	CELL	1	LC_X9_Y14_N0	tdc|a|tdc|le|phase|d|latch[0]|combout	64
10.779	  0.140	RR	IC	2	LC_X9_Y14_N1	tdc|a|tdc|le|phase|d|latch[1]|datad	65
10.867	  0.088	RR	CELL	1	LC_X9_Y14_N1	tdc|a|tdc|le|phase|d|latch[1]|combout	66
11.007	  0.140	RR	IC	2	LC_X9_Y14_N2	tdc|a|tdc|le|phase|d|latch[2]|datad	67
11.095	  0.088	RR	CELL	1	LC_X9_Y14_N2	tdc|a|tdc|le|phase|d|latch[2]|combout	68
11.235	  0.140	RR	IC	2	LC_X9_Y14_N3	tdc|a|tdc|le|phase|d|latch[3]|datad	69
11.323	  0.088	RR	CELL	1	LC_X9_Y14_N3	tdc|a|tdc|le|phase|d|latch[3]|combout	70
11.463	  0.140	RR	IC	2	LC_X9_Y14_N4	tdc|a|tdc|le|phase|d|latch[4]|datad	71
11.551	  0.088	RR	CELL	1	LC_X9_Y14_N4	tdc|a|tdc|le|phase|d|latch[4]|combout	72
11.813	  0.262	RR	IC	2	LC_X9_Y14_N5	tdc|a|tdc|le|phase|d|latch[5]|datad	73
11.901	  0.088	RR	CELL	1	LC_X9_Y14_N5	tdc|a|tdc|le|phase|d|latch[5]|combout	74
12.041	  0.140	RR	IC	2	LC_X9_Y14_N6	tdc|a|tdc|le|phase|d|latch[6]|datad	75
12.129	  0.088	RR	CELL	1	LC_X9_Y14_N6	tdc|a|tdc|le|phase|d|latch[6]|combout	76
12.269	  0.140	RR	IC	2	LC_X9_Y14_N7	tdc|a|tdc|le|phase|d|latch[7]|datad	77
12.357	  0.088	RR	CELL	1	LC_X9_Y14_N7	tdc|a|tdc|le|phase|d|latch[7]|combout	78
12.497	  0.140	RR	IC	2	LC_X9_Y14_N8	tdc|a|tdc|le|phase|d|latch[8]|datad	79
12.585	  0.088	RR	CELL	1	LC_X9_Y14_N8	tdc|a|tdc|le|phase|d|latch[8]|combout	80
12.725	  0.140	RR	IC	1	LC_X9_Y14_N9	tdc|a|tdc|le|phase|d|latch[9]|datad	81
12.813	  0.088	RR	CELL	1	LC_X9_Y14_N9	tdc|a|tdc|le|phase|d|latch[9]|combout	82
13.148	  0.335	RR	IC	1	LC_X9_Y14_N9	tdc|a|tdc|le|phase|d|latch[9]|datac	83
13.237	  0.089	RR	CELL	1	LC_X9_Y14_N9	TDC6:tdc|TDC2ef:a|TDC2e:tdc|TDC1:le|TDClcell40:phase|TDClcell10:d|latch[9]	84

minimal time bin: 140+88 = 228 ps
10.0 ns period / 0.228 ps = 43.9 bins

tdc6i.pdf
min bin: 0.065 0.038 0.062 0.040 ns, max bin: 1.000 0.840 0.681 0.913 ns, max phase 39 39 39 39
min bin: 0.062 0.035 0.075 0.029 ns, max bin: 0.895 1.042 0.800 0.997 ns, max phase 39 39 39 39
min bin: 0.063 0.036 0.027 0.033 ns, max bin: 0.918 0.985 0.596 0.933 ns, max phase 39 39 39 39

without set_max_delay
19.341
19.341	19.341					data path	1
0.000	  0.000			1	LC_X14_Y20_N0	TS_DFF[0]	1
0.000	  0.000	RR	CELL	10	LC_X14_Y20_N0	TS_DFF[0]|regout	2
1.339	  1.339	RR	IC	2	LC_X13_Y15_N4	tdc|a|tdc|le|phase|a|latch[0]|datad	3
1.427	  0.088	RR	CELL	1	LC_X13_Y15_N4	tdc|a|tdc|le|phase|a|latch[0]|combout	4
1.763	  0.336	RR	IC	2	LC_X13_Y15_N9	tdc|a|tdc|le|phase|a|latch[1]|datac	5
1.988	  0.225	RR	CELL	1	LC_X13_Y15_N9	tdc|a|tdc|le|phase|a|latch[1]|combout	6
2.324	  0.336	RR	IC	2	LC_X13_Y15_N2	tdc|a|tdc|le|phase|a|latch[2]|datac	7
2.549	  0.225	RR	CELL	1	LC_X13_Y15_N2	tdc|a|tdc|le|phase|a|latch[2]|combout	8
2.689	  0.140	RR	IC	2	LC_X13_Y15_N3	tdc|a|tdc|le|phase|a|latch[3]|datad	9
2.777	  0.088	RR	CELL	1	LC_X13_Y15_N3	tdc|a|tdc|le|phase|a|latch[3]|combout	10
3.097	  0.320	RR	IC	2	LC_X13_Y15_N5	tdc|a|tdc|le|phase|a|latch[4]|datad	11
3.185	  0.088	RR	CELL	1	LC_X13_Y15_N5	tdc|a|tdc|le|phase|a|latch[4]|combout	12
3.325	  0.140	RR	IC	2	LC_X13_Y15_N6	tdc|a|tdc|le|phase|a|latch[5]|datad	13
3.413	  0.088	RR	CELL	1	LC_X13_Y15_N6	tdc|a|tdc|le|phase|a|latch[5]|combout	14
4.355	  0.942	RR	IC	2	LC_X13_Y16_N9	tdc|a|tdc|le|phase|a|latch[6]|datac	15
4.580	  0.225	RR	CELL	1	LC_X13_Y16_N9	tdc|a|tdc|le|phase|a|latch[6]|combout	16
4.919	  0.339	RR	IC	2	LC_X13_Y16_N6	tdc|a|tdc|le|phase|a|latch[7]|datac	17
5.144	  0.225	RR	CELL	1	LC_X13_Y16_N6	tdc|a|tdc|le|phase|a|latch[7]|combout	18
5.470	  0.326	RR	IC	2	LC_X13_Y16_N0	tdc|a|tdc|le|phase|a|latch[8]|datad	19
5.558	  0.088	RR	CELL	1	LC_X13_Y16_N0	tdc|a|tdc|le|phase|a|latch[8]|combout	20
5.887	  0.329	RR	IC	2	LC_X13_Y16_N8	tdc|a|tdc|le|phase|a|latch[9]|datad	21
5.975	  0.088	RR	CELL	1	LC_X13_Y16_N8	tdc|a|tdc|le|phase|a|latch[9]|combout	22
6.314	  0.339	RR	IC	2	LC_X13_Y16_N7	tdc|a|tdc|le|phase|b|latch[0]|datac	23
6.539	  0.225	RR	CELL	1	LC_X13_Y16_N7	tdc|a|tdc|le|phase|b|latch[0]|combout	24
6.879	  0.340	RR	IC	2	LC_X13_Y16_N3	tdc|a|tdc|le|phase|b|latch[1]|datac	25
7.104	  0.225	RR	CELL	1	LC_X13_Y16_N3	tdc|a|tdc|le|phase|b|latch[1]|combout	26
7.433	  0.329	RR	IC	2	LC_X13_Y16_N5	tdc|a|tdc|le|phase|b|latch[2]|datad	27
7.521	  0.088	RR	CELL	1	LC_X13_Y16_N5	tdc|a|tdc|le|phase|b|latch[2]|combout	28
7.850	  0.329	RR	IC	2	LC_X13_Y16_N1	tdc|a|tdc|le|phase|b|latch[3]|datad	29
7.938	  0.088	RR	CELL	1	LC_X13_Y16_N1	tdc|a|tdc|le|phase|b|latch[3]|combout	30
8.262	  0.324	RR	IC	2	LC_X13_Y16_N4	tdc|a|tdc|le|phase|b|latch[4]|datad	31
8.350	  0.088	RR	CELL	1	LC_X13_Y16_N4	tdc|a|tdc|le|phase|b|latch[4]|combout	32
8.691	  0.341	RR	IC	2	LC_X13_Y16_N2	tdc|a|tdc|le|phase|b|latch[5]|datac	33
8.916	  0.225	RR	CELL	1	LC_X13_Y16_N2	tdc|a|tdc|le|phase|b|latch[5]|combout	34
9.445	  0.529	RR	IC	2	LC_X14_Y16_N5	tdc|a|tdc|le|phase|b|latch[6]|datad	35
9.533	  0.088	RR	CELL	1	LC_X14_Y16_N5	tdc|a|tdc|le|phase|b|latch[6]|combout	36
9.673	  0.140	RR	IC	2	LC_X14_Y16_N6	tdc|a|tdc|le|phase|b|latch[7]|datad	37
9.761	  0.088	RR	CELL	1	LC_X14_Y16_N6	tdc|a|tdc|le|phase|b|latch[7]|combout	38
10.081	  0.320	RR	IC	2	LC_X14_Y16_N3	tdc|a|tdc|le|phase|b|latch[8]|datad	39
10.169	  0.088	RR	CELL	1	LC_X14_Y16_N3	tdc|a|tdc|le|phase|b|latch[8]|combout	40
10.488	  0.319	RR	IC	2	LC_X14_Y16_N7	tdc|a|tdc|le|phase|b|latch[9]|datad	41
10.576	  0.088	RR	CELL	1	LC_X14_Y16_N7	tdc|a|tdc|le|phase|b|latch[9]|combout	42
10.716	  0.140	RR	IC	2	LC_X14_Y16_N8	tdc|a|tdc|le|phase|c|latch[0]|datad	43
10.804	  0.088	RR	CELL	1	LC_X14_Y16_N8	tdc|a|tdc|le|phase|c|latch[0]|combout	44
10.944	  0.140	RR	IC	2	LC_X14_Y16_N9	tdc|a|tdc|le|phase|c|latch[1]|datad	45
11.032	  0.088	RR	CELL	1	LC_X14_Y16_N9	tdc|a|tdc|le|phase|c|latch[1]|combout	46
11.557	  0.525	RR	IC	2	LC_X15_Y16_N3	tdc|a|tdc|le|phase|c|latch[2]|datad	47
11.645	  0.088	RR	CELL	1	LC_X15_Y16_N3	tdc|a|tdc|le|phase|c|latch[2]|combout	48
11.972	  0.327	RR	IC	2	LC_X15_Y16_N6	tdc|a|tdc|le|phase|c|latch[3]|datad	49
12.060	  0.088	RR	CELL	1	LC_X15_Y16_N6	tdc|a|tdc|le|phase|c|latch[3]|combout	50
12.200	  0.140	RR	IC	2	LC_X15_Y16_N7	tdc|a|tdc|le|phase|c|latch[4]|datad	51
12.288	  0.088	RR	CELL	1	LC_X15_Y16_N7	tdc|a|tdc|le|phase|c|latch[4]|combout	52
12.627	  0.339	RR	IC	2	LC_X15_Y16_N5	tdc|a|tdc|le|phase|c|latch[5]|datac	53
12.852	  0.225	RR	CELL	1	LC_X15_Y16_N5	tdc|a|tdc|le|phase|c|latch[5]|combout	54
13.182	  0.330	RR	IC	2	LC_X15_Y16_N0	tdc|a|tdc|le|phase|c|latch[6]|datad	55
13.270	  0.088	RR	CELL	1	LC_X15_Y16_N0	tdc|a|tdc|le|phase|c|latch[6]|combout	56
13.599	  0.329	RR	IC	2	LC_X15_Y16_N8	tdc|a|tdc|le|phase|c|latch[7]|datad	57
13.687	  0.088	RR	CELL	1	LC_X15_Y16_N8	tdc|a|tdc|le|phase|c|latch[7]|combout	58
13.827	  0.140	RR	IC	2	LC_X15_Y16_N9	tdc|a|tdc|le|phase|c|latch[8]|datad	59
13.915	  0.088	RR	CELL	1	LC_X15_Y16_N9	tdc|a|tdc|le|phase|c|latch[8]|combout	60
14.255	  0.340	RR	IC	2	LC_X15_Y16_N1	tdc|a|tdc|le|phase|c|latch[9]|datac	61
14.480	  0.225	RR	CELL	1	LC_X15_Y16_N1	tdc|a|tdc|le|phase|c|latch[9]|combout	62
14.799	  0.319	RR	IC	2	LC_X15_Y16_N4	tdc|a|tdc|le|phase|d|latch[0]|datad	63
14.887	  0.088	RR	CELL	1	LC_X15_Y16_N4	tdc|a|tdc|le|phase|d|latch[0]|combout	64
15.223	  0.336	RR	IC	2	LC_X15_Y16_N2	tdc|a|tdc|le|phase|d|latch[1]|datac	65
15.448	  0.225	RR	CELL	1	LC_X15_Y16_N2	tdc|a|tdc|le|phase|d|latch[1]|combout	66
16.378	  0.930	RR	IC	2	LC_X14_Y15_N0	tdc|a|tdc|le|phase|d|latch[2]|datad	67
16.466	  0.088	RR	CELL	1	LC_X14_Y15_N0	tdc|a|tdc|le|phase|d|latch[2]|combout	68
16.606	  0.140	RR	IC	2	LC_X14_Y15_N1	tdc|a|tdc|le|phase|d|latch[3]|datad	69
16.694	  0.088	RR	CELL	1	LC_X14_Y15_N1	tdc|a|tdc|le|phase|d|latch[3]|combout	70
17.015	  0.321	RR	IC	2	LC_X14_Y15_N5	tdc|a|tdc|le|phase|d|latch[4]|datad	71
17.103	  0.088	RR	CELL	1	LC_X14_Y15_N5	tdc|a|tdc|le|phase|d|latch[4]|combout	72
17.243	  0.140	RR	IC	2	LC_X14_Y15_N6	tdc|a|tdc|le|phase|d|latch[5]|datad	73
17.331	  0.088	RR	CELL	1	LC_X14_Y15_N6	tdc|a|tdc|le|phase|d|latch[5]|combout	74
17.471	  0.140	RR	IC	2	LC_X14_Y15_N7	tdc|a|tdc|le|phase|d|latch[6]|datad	75
17.559	  0.088	RR	CELL	1	LC_X14_Y15_N7	tdc|a|tdc|le|phase|d|latch[6]|combout	76
17.898	  0.339	RR	IC	2	LC_X14_Y15_N4	tdc|a|tdc|le|phase|d|latch[7]|datac	77
18.123	  0.225	RR	CELL	1	LC_X14_Y15_N4	tdc|a|tdc|le|phase|d|latch[7]|combout	78
18.459	  0.336	RR	IC	2	LC_X14_Y15_N8	tdc|a|tdc|le|phase|d|latch[8]|datac	79
18.684	  0.225	RR	CELL	1	LC_X14_Y15_N8	tdc|a|tdc|le|phase|d|latch[8]|combout	80
18.824	  0.140	RR	IC	1	LC_X14_Y15_N9	tdc|a|tdc|le|phase|d|inst9|datad	81
18.912	  0.088	RR	CELL	1	LC_X14_Y15_N9	tdc|a|tdc|le|phase|d|inst9|combout	82
19.252	  0.340	RR	IC	1	LC_X14_Y15_N3	tdc|a|tdc|le|phase|d|latch[9]|datac	83
19.341	  0.089	RR	CELL	1	LC_X14_Y15_N3 TDC6:tdc|TDC2ef:a|TDC2e:tdc|TDC1:le|TDClcell40:phase|TDClcell10:d|latch[9]

tdc6j.pdf

Cyclone-5

report_path -multi_corner -panel_name {Report Path} -to [get_keepers {TDC6:TDC6_inst|TDC2ef:a|TDC2e:tdc|TDC1:le|TDClcell40:phase|TDClcell10:d|latch[9]}] -npaths 1

21.108	21.108					data path	1
0.000	  0.000			1	FF_X85_Y18_N2	tdc_ts[0]	1
0.000	  0.000	RR	CELL	9	FF_X85_Y18_N2	tdc_ts[0]|q	2
1.530	  1.530	RR	IC	1	MLABCELL_X87_Y10_N15	TDC6_inst|a|tdc|le|phase|a|inst0|dataf	3
1.617	  0.087	RR	CELL	2	MLABCELL_X87_Y10_N15	TDC6_inst|a|tdc|le|phase|a|inst0|combout	4
1.860	  0.243	RR	IC	1	MLABCELL_X87_Y10_N6	TDC6_inst|a|tdc|le|phase|a|inst1|dataf	5
1.946	  0.086	RR	CELL	2	MLABCELL_X87_Y10_N6	TDC6_inst|a|tdc|le|phase|a|inst1|combout	6
2.714	  0.768	RR	IC	1	LABCELL_X85_Y11_N51	TDC6_inst|a|tdc|le|phase|a|inst2|dataf	7
2.800	  0.086	RR	CELL	2	LABCELL_X85_Y11_N51	TDC6_inst|a|tdc|le|phase|a|inst2|combout	8
3.323	  0.523	RR	IC	1	LABCELL_X85_Y11_N48	TDC6_inst|a|tdc|le|phase|a|inst3|datad	9
3.576	  0.253	RR	CELL	2	LABCELL_X85_Y11_N48	TDC6_inst|a|tdc|le|phase|a|inst3|combout	10
3.827	  0.251	RR	IC	1	LABCELL_X85_Y11_N15	TDC6_inst|a|tdc|le|phase|a|inst4|dataf	11
3.914	  0.087	RR	CELL	2	LABCELL_X85_Y11_N15	TDC6_inst|a|tdc|le|phase|a|inst4|combout	12
4.146	  0.232	RR	IC	1	LABCELL_X85_Y11_N12	TDC6_inst|a|tdc|le|phase|a|inst5|dataf	13
4.233	  0.087	RR	CELL	2	LABCELL_X85_Y11_N12	TDC6_inst|a|tdc|le|phase|a|inst5|combout	14
4.484	  0.251	RR	IC	1	LABCELL_X85_Y11_N9	TDC6_inst|a|tdc|le|phase|a|inst6|dataf	15
4.571	  0.087	RR	CELL	2	LABCELL_X85_Y11_N9	TDC6_inst|a|tdc|le|phase|a|inst6|combout	16
4.800	  0.229	RR	IC	1	LABCELL_X85_Y11_N6	TDC6_inst|a|tdc|le|phase|a|inst7|dataf	17
4.887	  0.087	RR	CELL	2	LABCELL_X85_Y11_N6	TDC6_inst|a|tdc|le|phase|a|inst7|combout	18
5.124	  0.237	RR	IC	1	LABCELL_X85_Y11_N3	TDC6_inst|a|tdc|le|phase|a|inst8|dataf	19
5.211	  0.087	RR	CELL	2	LABCELL_X85_Y11_N3	TDC6_inst|a|tdc|le|phase|a|inst8|combout	20
5.459	  0.248	RR	IC	1	LABCELL_X85_Y11_N0	TDC6_inst|a|tdc|le|phase|a|inst9|datac	21
5.864	  0.405	RR	CELL	2	LABCELL_X85_Y11_N0	TDC6_inst|a|tdc|le|phase|a|inst9|combout	22
6.075	  0.211	RR	IC	1	LABCELL_X85_Y11_N27	TDC6_inst|a|tdc|le|phase|b|inst0|dataa	23
6.656	  0.581	RR	CELL	2	LABCELL_X85_Y11_N27	TDC6_inst|a|tdc|le|phase|b|inst0|combout	24
6.901	  0.245	RR	IC	1	LABCELL_X85_Y11_N24	TDC6_inst|a|tdc|le|phase|b|inst1|datac	25
7.306	  0.405	RR	CELL	2	LABCELL_X85_Y11_N24	TDC6_inst|a|tdc|le|phase|b|inst1|combout	26
7.552	  0.246	RR	IC	1	LABCELL_X85_Y11_N21	TDC6_inst|a|tdc|le|phase|b|inst2|dataf	27
7.639	  0.087	RR	CELL	2	LABCELL_X85_Y11_N21	TDC6_inst|a|tdc|le|phase|b|inst2|combout	28
7.886	  0.247	RR	IC	1	LABCELL_X85_Y11_N18	TDC6_inst|a|tdc|le|phase|b|inst3|datac	29
8.291	  0.405	RR	CELL	2	LABCELL_X85_Y11_N18	TDC6_inst|a|tdc|le|phase|b|inst3|combout	30
8.548	  0.257	RR	IC	1	LABCELL_X85_Y11_N45	TDC6_inst|a|tdc|le|phase|b|inst4|dataf	31
8.635	  0.087	RR	CELL	2	LABCELL_X85_Y11_N45	TDC6_inst|a|tdc|le|phase|b|inst4|combout	32
8.839	  0.204	RR	IC	1	LABCELL_X85_Y11_N42	TDC6_inst|a|tdc|le|phase|b|inst5|datab	33
9.394	  0.555	RR	CELL	2	LABCELL_X85_Y11_N42	TDC6_inst|a|tdc|le|phase|b|inst5|combout	34
9.638	  0.244	RR	IC	1	LABCELL_X85_Y11_N39	TDC6_inst|a|tdc|le|phase|b|inst6|dataf	35
9.725	  0.087	RR	CELL	2	LABCELL_X85_Y11_N39	TDC6_inst|a|tdc|le|phase|b|inst6|combout	36
9.959	  0.234	RR	IC	1	LABCELL_X85_Y11_N36	TDC6_inst|a|tdc|le|phase|b|inst7|dataf	37
10.046	  0.087	RR	CELL	2	LABCELL_X85_Y11_N36	TDC6_inst|a|tdc|le|phase|b|inst7|combout	38
10.250	  0.204	RR	IC	1	LABCELL_X85_Y11_N33	TDC6_inst|a|tdc|le|phase|b|inst8|dataa	39
10.831	  0.581	RR	CELL	2	LABCELL_X85_Y11_N33	TDC6_inst|a|tdc|le|phase|b|inst8|combout	40
11.059	  0.228	RR	IC	1	LABCELL_X85_Y11_N30	TDC6_inst|a|tdc|le|phase|b|inst9|dataf	41
11.145	  0.086	RR	CELL	2	LABCELL_X85_Y11_N30	TDC6_inst|a|tdc|le|phase|b|inst9|combout	42
11.724	  0.579	RR	IC	1	LABCELL_X88_Y11_N57	TDC6_inst|a|tdc|le|phase|c|inst0|dataf	43
11.811	  0.087	RR	CELL	2	LABCELL_X88_Y11_N57	TDC6_inst|a|tdc|le|phase|c|inst0|combout	44
12.018	  0.207	RR	IC	1	LABCELL_X88_Y11_N54	TDC6_inst|a|tdc|le|phase|c|inst1|datab	45
12.573	  0.555	RR	CELL	2	LABCELL_X88_Y11_N54	TDC6_inst|a|tdc|le|phase|c|inst1|combout	46
12.780	  0.207	RR	IC	1	LABCELL_X88_Y11_N51	TDC6_inst|a|tdc|le|phase|c|inst2|dataa	47
13.361	  0.581	RR	CELL	2	LABCELL_X88_Y11_N51	TDC6_inst|a|tdc|le|phase|c|inst2|combout	48
13.591	  0.230	RR	IC	1	LABCELL_X88_Y11_N48	TDC6_inst|a|tdc|le|phase|c|inst3|dataf	49
13.678	  0.087	RR	CELL	2	LABCELL_X88_Y11_N48	TDC6_inst|a|tdc|le|phase|c|inst3|combout	50
13.935	  0.257	RR	IC	1	LABCELL_X88_Y11_N15	TDC6_inst|a|tdc|le|phase|c|inst4|dataf	51
14.022	  0.087	RR	CELL	2	LABCELL_X88_Y11_N15	TDC6_inst|a|tdc|le|phase|c|inst4|combout	52
14.254	  0.232	RR	IC	1	LABCELL_X88_Y11_N12	TDC6_inst|a|tdc|le|phase|c|inst5|dataf	53
14.341	  0.087	RR	CELL	2	LABCELL_X88_Y11_N12	TDC6_inst|a|tdc|le|phase|c|inst5|combout	54
14.592	  0.251	RR	IC	1	LABCELL_X88_Y11_N9	TDC6_inst|a|tdc|le|phase|c|inst6|dataf	55
14.679	  0.087	RR	CELL	2	LABCELL_X88_Y11_N9	TDC6_inst|a|tdc|le|phase|c|inst6|combout	56
14.908	  0.229	RR	IC	1	LABCELL_X88_Y11_N6	TDC6_inst|a|tdc|le|phase|c|inst7|dataf	57
14.995	  0.087	RR	CELL	2	LABCELL_X88_Y11_N6	TDC6_inst|a|tdc|le|phase|c|inst7|combout	58
15.247	  0.252	RR	IC	1	LABCELL_X88_Y11_N33	TDC6_inst|a|tdc|le|phase|c|inst8|dataf	59
15.334	  0.087	RR	CELL	2	LABCELL_X88_Y11_N33	TDC6_inst|a|tdc|le|phase|c|inst8|combout	60
15.568	  0.234	RR	IC	1	LABCELL_X88_Y11_N30	TDC6_inst|a|tdc|le|phase|c|inst9|dataf	61
15.655	  0.087	RR	CELL	2	LABCELL_X88_Y11_N30	TDC6_inst|a|tdc|le|phase|c|inst9|combout	62
15.909	  0.254	RR	IC	1	LABCELL_X88_Y11_N27	TDC6_inst|a|tdc|le|phase|d|inst0|dataf	63
15.996	  0.087	RR	CELL	2	LABCELL_X88_Y11_N27	TDC6_inst|a|tdc|le|phase|d|inst0|combout	64
16.241	  0.245	RR	IC	1	LABCELL_X88_Y11_N24	TDC6_inst|a|tdc|le|phase|d|inst1|datac	65
16.646	  0.405	RR	CELL	2	LABCELL_X88_Y11_N24	TDC6_inst|a|tdc|le|phase|d|inst1|combout	66
16.892	  0.246	RR	IC	1	LABCELL_X88_Y11_N21	TDC6_inst|a|tdc|le|phase|d|inst2|dataf	67
16.979	  0.087	RR	CELL	2	LABCELL_X88_Y11_N21	TDC6_inst|a|tdc|le|phase|d|inst2|combout	68
17.226	  0.247	RR	IC	1	LABCELL_X88_Y11_N18	TDC6_inst|a|tdc|le|phase|d|inst3|datac	69
17.631	  0.405	RR	CELL	2	LABCELL_X88_Y11_N18	TDC6_inst|a|tdc|le|phase|d|inst3|combout	70
17.888	  0.257	RR	IC	1	LABCELL_X88_Y11_N45	TDC6_inst|a|tdc|le|phase|d|inst4|dataf	71
17.975	  0.087	RR	CELL	2	LABCELL_X88_Y11_N45	TDC6_inst|a|tdc|le|phase|d|inst4|combout	72
18.185	  0.210	RR	IC	1	LABCELL_X88_Y11_N42	TDC6_inst|a|tdc|le|phase|d|inst5|datab	73
18.740	  0.555	RR	CELL	2	LABCELL_X88_Y11_N42	TDC6_inst|a|tdc|le|phase|d|inst5|combout	74
18.984	  0.244	RR	IC	1	LABCELL_X88_Y11_N39	TDC6_inst|a|tdc|le|phase|d|inst6|dataf	75
19.071	  0.087	RR	CELL	2	LABCELL_X88_Y11_N39	TDC6_inst|a|tdc|le|phase|d|inst6|combout	76
19.305	  0.234	RR	IC	1	LABCELL_X88_Y11_N36	TDC6_inst|a|tdc|le|phase|d|inst7|dataf	77
19.392	  0.087	RR	CELL	2	LABCELL_X88_Y11_N36	TDC6_inst|a|tdc|le|phase|d|inst7|combout	78
19.618	  0.226	RR	IC	1	LABCELL_X88_Y11_N3	TDC6_inst|a|tdc|le|phase|d|inst8|dataa	79
20.199	  0.581	RR	CELL	2	LABCELL_X88_Y11_N3	TDC6_inst|a|tdc|le|phase|d|inst8|combout	80
20.447	  0.248	RR	IC	1	LABCELL_X88_Y11_N0	TDC6_inst|a|tdc|le|phase|d|inst9|datac	81
20.847	  0.000	RR	IC	1	FF_X88_Y11_N2	TDC6_inst|a|tdc|le|phase|d|latch[9]|d	82
20.847	  0.400	RR	CELL	1	LABCELL_X88_Y11_N0	TDC6_inst|a|tdc|le|phase|d|inst9|combout	83
21.108	  0.261	RR	CELL	1	FF_X88_Y11_N2	TDC6:TDC6_inst|TDC2ef:a|TDC2e:tdc|TDC1:le|TDClcell40:phase|TDClcell10:d|latch[9]	84

tdc6g.pdf

min bin: 0.021 0.016 0.031 0.030 ns, max bin: 0.484 0.612 0.872 1.171 ns, max phase 38 36 33 33
min bin: 0.016 0.074 0.009 0.130 ns, max bin: 0.857 0.727 0.622 0.782 ns, max phase 33 30 38 35
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