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== Existing ALPHA-2 SVD == | == Existing ALPHA-2 SVD == | ||
* VME-TTC schematics [[File::ALPHA_TTC_20091105.pdf]] | |||
* VME-TTC firmware diagram [[ALPHA_TTC_20091105.pdf]] | |||
* VME-TTC manual https://bitbucket.org/expalpha/ttc_firmware/src/master/alphaTTC.txt | |||
Clock distribution: | |||
<pre> | |||
IO32 internal osc (IO32 has no external trigger input) -> 2x LEMO NIM output 20 MHz -> | |||
-> TTC1 | |||
-> TTC FP_Ext_TrigInput1 (VETO_IN LEMO1A) -> 20 MHz PLL -> PLL1_20MHz -> mux -> mux_clk -> pll_20MHz -> (ADC clock LEMO5A) | |||
-> VF48 20MHz clock daisy chain, 4 VF48 modules | |||
same thing repeats for the 2nd TTC | |||
-> TTC2 | |||
</pre> | |||
TTC functions: | |||
* Downloading VA1TA configurations (BOOT control) | |||
* Control of calibration pulser DACs | |||
* Sequencing the readout of the VA1TA analog multiplexor and VF48 trigger | |||
* Processing VA1TA TA outputs and generation of NIM trigger outputs | |||
= End = | = End = | ||
Revision as of 22:52, 23 June 2026
ALPHA AD-5 at CERN
Links
- ALPHA-2 MIDAS: https://alphacpc05.cern.ch
- ALPHA-g MIDAS: https://alphacpc05.cern.ch/agdaq/
- nodeinfo: https://alphacpc05.cern.ch/gonodeinfo/gonodereport.html
- zfs quota report: https://alphacpc05.cern.ch/zfsquotareport/zfsquota.html
- ganglia: https://alphacpc05.cern.ch/ganglia/
- elog: https://alphacpc05.cern.ch/elog/alpha/
- AgWiki: https://daq00.triumf.ca/AgWiki/
- old alpha-g elog: https://daq00.triumf.ca/elog-alphag-old/alphag/
ALPHA-2
Rebuild midas:
- cd ~/packages/midas; make clean; make cmake -j
- restart mlogger, mserver, mhttpd, lazylogger
Rebuild frontends:
- fevme: ssh alphavme04, cd online/vme, make clean, make, restart fevme
- SVD bias P.S. fecaenr14xxet.exe: cd packages/frontends/fecaen14xxet, make clean, make, restart fecaen_hvps01
- felabview: no update
- super_felabiew, feXSequencer: cd online/src, make clean, make, not sure how to install to ../bin and restart.
- feGEM: cd online/feGEM, make clean, make,
ALPHA-3 SVD Upgrade
Existing ALPHA-2 SVD
- VME-TTC schematics [[File::ALPHA_TTC_20091105.pdf]]
- VME-TTC firmware diagram ALPHA_TTC_20091105.pdf
- VME-TTC manual https://bitbucket.org/expalpha/ttc_firmware/src/master/alphaTTC.txt
Clock distribution:
IO32 internal osc (IO32 has no external trigger input) -> 2x LEMO NIM output 20 MHz -> -> TTC1 -> TTC FP_Ext_TrigInput1 (VETO_IN LEMO1A) -> 20 MHz PLL -> PLL1_20MHz -> mux -> mux_clk -> pll_20MHz -> (ADC clock LEMO5A) -> VF48 20MHz clock daisy chain, 4 VF48 modules same thing repeats for the 2nd TTC -> TTC2
TTC functions:
- Downloading VA1TA configurations (BOOT control)
- Control of calibration pulser DACs
- Sequencing the readout of the VA1TA analog multiplexor and VF48 trigger
- Processing VA1TA TA outputs and generation of NIM trigger outputs