VME-ALPHA-TTC: Difference between revisions

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== Photos ====
== Photos ====


[[Image:VME-NIMIO32-Rev0-Rev1.jpg|150px|Rev0 and Rev 1 boards]]
[[Image:VME-ALPHA-TTC.jpg|150px|]]


== Available hardware ==
== Available hardware ==

Revision as of 14:59, 17 September 2012

VME-ALPHA-TTC - ALPHA (CERN AD-5) Si vertex detector control module

References

  • [1] SVN repository for firmware and documentation
  • [2] AlphaTTC schematics
  • [3] firmware manual

Photos ==

File:VME-ALPHA-TTC.jpg

Available hardware

  • Main FPGA: Altera cyclone 1: EP1C6Q240C6N
  • Trigger FPGA: two of the same (3 FPGA grand total)
  • Serial flash for FPGA configuration: Altera EPCS16
  • 6+6 NIM outputs
  • 2 analog outputs for calibration pulse
  • 2 NIM inputs
  • 256 LVDS inputs into the 2 trigger FPGAs (128 inputs each)

Firmware update procedure

  • obtain and build the VME programmer (srunner_vme) and IO32 test program (test_VMENIMIO32):
  • read the firmware revision from VME register 0:
    • ./test_VMENIMIO32_gef.exe --addr 0x100000 --read 0
  • write Cyclone 1 FPGA firmware into the flash memory using the VME programmer:
    • ./srunner_vme_gef.exe -program -64 VME-NIMIO32.pof 0x100020
    • !!!be careful about using Rev0 pof files for Rev0 boards and Rev1 pof files for Rev1 boards!!!
  • reboot the Cyclone 1 FPGA into the new firmware (requires "fpga-reset" mod):
    • ./test_VMENIMIO32_gef.exe --addr 0x100000 --reboot

Firmware revisions

Firmware for the main FPGA:

  • firmware sources [[4]]
  • firmware schematics [[5]]
  • pof files for Rev0 [[6]]

Firmware for the VME address decoder:

  • firmware sources [[7]]
  • board Rev0 [[8]]