| Date |
User |
Note |
| 2023-02-15 00:00:00 |
|
no short |
| 2023-02-15 00:00:00 |
|
5V 0.85A
2.5V 0.05A |
| 2023-02-15 00:00:00 |
|
jtagconfig
02B120DD 5CGXBC4C(6|7)/5CGXFC4C(6|7)/.. |
| 2023-02-15 00:00:00 |
|
nios2-terminal: There are no JTAG UARTs available which match the --device and
nios2-terminal: --instance options you provided.
|
| 2023-02-15 00:00:00 |
|
flashed SOF - success |
| 2023-02-15 00:00:00 |
|
agmini@daq16:~/online/firmware/pwb_rev1 /opt/intelFPGA/16.1/quartus/bin/nios2-terminal --cable 3
nios2-terminal: connected to hardware target using JTAG UART on cable
nios2-terminal: "USB-Blaster [2-1.8]", device 1, instance 0
nios2-terminal: (Use the IDE stop button or Ctrl-C to terminate)
bootloader started!
LMK04816 status:
LMK04816 not initialized for reading registers, readback stuck high
clocks status: CLKin2 CLKin1 no-HOLD no-LD lock_count: 0x0, freq: eth 0x0, sata 0x0
Initialing LMK04816 Clock Cleaner...
In forced HOLDOVER mode...
Done
LMK04816 status:
regmap.r13.CLKin_SELECT_MODE: 0x2
regmap.r15.FORCE_HOLDOVER: 0x1
regmap.r23: 0x70000017, DAC 0x200
clocks status: CLKin1 HOLD no-LD lock_count: 0x0, freq: eth 0x0, sata 0x0
Waiting for DDR RAM calibration...
csr4: 0x4000000 - pll_locked and waiting...loop 0x0
csr4: 0x5000000 - pll_locked and calibration good...loop 0x1
DDR RAM calibration success!
PWB Revision 1 Boot Loader
Ver 2.0 Build 516 - Mon Oct 5 08:38:26 PDT 2020
Git Hash: 7d8e060f6420370f58fc41b2475d58433384b4b6
Git Branch [Tag]: alphag []
Built by: First Last (noreply@example.com)
Opening Flash Device /dev/epcq_config_avl_mem...
Success
Locking all sectors of epcq flash...
Success
Opening Remote Update Module /dev/remote_update...
Success
Reconfig Trigger Conditions:
Watchdog Timeout: False
nCONFIG Asserted: False
Reset Request: False
nSTATUS Asserted: False
CRC Error: True
Watchdog Enabled: False
Current Mode: Factory
Factory Image Selected at 0x0
SFP Module Status: SFP module not found!
SFP LOS Status: BAD. No SFP or no fiber connected!
Waiting for DDR RAM calibration...
csr4: 0x5000000 - pll_locked and calibration good...loop 0x0
DDR RAM calibration success!
Power up the wing board...
Chip ID hi 0xf14004, low 0x30760308
Delay 0x8
Firmware image address in flash: 0x600000
Checking Flash Image...
Found Flash Signature 0x0
Flash image signature not found
Clock status...
LMK04816 status:
regmap.r13.CLKin_SELECT_MODE: 0x2
regmap.r15.FORCE_HOLDOVER: 0x1
regmap.r23: 0x70000017, DAC 0x200
clocks status: CLKin1 HOLD no-LD lock_count: 0x0, freq: eth 0x3cdbb0b, sata 0x3c60dca
memtest_ko() running...
reading DDR RAM at address 0x0...
success reading DDR RAM at address 0x0, data: 0xaaaaaaaa
bit pattern tests...
address and refresh test...
refresh test...
address test...
memtest_ko() success!
Starting Memory Checker...
- Running Walking Zero Pattern Test.... Passed
- Running Walking One Pattern Test.... Passed
- Running Synchronous PRBS Pattern Test.... Passed
- Running PRBS Test.... Passed
Memory Check Passed
memtest_ko() running...
reading DDR RAM at address 0x0...
success reading DDR RAM at address 0x0, data: 0xdeadbeef
bit pattern tests...
address and refresh test...
refresh test...
address test...
memtest_ko() success!
Flash image is no good, cannot continue! |
| 2023-02-15 00:00:00 |
|
flash jic success |
| 2023-02-15 00:00:00 |
|
nios terminal
Memory Check Passed
memtest_ko() success!
ends at
MAC address: ff:ff:ff:ff:ff:ff
mctest init called
IP address of et1 : 0.0.0.0
ends at |
| 2023-03-29 00:00:00 |
|
hubert cleaned soldering of SCA 0, 4 dead channels are now okey. |
| 2023-03-29 00:00:00 |
|
no dead channels. L.M. |
| 2023-04-05 00:00:00 |
|
Ext SPI caps removed |
| 2023-04-17 00:00:00 |
|
baseline resistors are correct. K.O. & L.M. |