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Functions | |
void | vmeio_OutputSet (MVME_INTERFACE *myvme, DWORD base, DWORD data) |
void | vmeio_SyncWrite (MVME_INTERFACE *myvme, DWORD base, DWORD data) |
void | vmeio_AsyncWrite (MVME_INTERFACE *myvme, DWORD base, DWORD data) |
int | vmeio_CsrRead (MVME_INTERFACE *myvme, DWORD base) |
int | vmeio_AsyncRead (MVME_INTERFACE *myvme, DWORD base) |
int | vmeio_SyncRead (MVME_INTERFACE *myvme, DWORD base) |
void | vmeio_StrobeClear (MVME_INTERFACE *myvme, DWORD base) |
void | vmeio_IntEnable (MVME_INTERFACE *myvme, DWORD base, int input) |
void | vmeio_IntRearm (MVME_INTERFACE *myvme, DWORD base, int input) |
static void | myisrvmeio (int sig, siginfo_t *siginfo, void *extra) |
static void myisrvmeio | ( | int | sig, | |
siginfo_t * | siginfo, | |||
void * | extra | |||
) | [static] |
int vmeio_AsyncRead | ( | MVME_INTERFACE * | myvme, | |
DWORD | base | |||
) |
Read from the Async register
myvme | vme structure | |
base | VMEIO base address |
Definition at line 84 of file vme/vmeio.c.
00085 { 00086 int csr; 00087 mvme_set_am(myvme, MVME_AM_A24_ND); 00088 mvme_set_dmode(myvme, MVME_DMODE_D32); 00089 csr = mvme_read_value(myvme, base+VMEIO_RDASYNC); 00090 return (csr & 0xFFFFFF); 00091 }
void vmeio_AsyncWrite | ( | MVME_INTERFACE * | myvme, | |
DWORD | base, | |||
DWORD | data | |||
) |
Writee to the Async output (latch mode)
myvme | vme structure | |
base | VMEIO base address | |
data | data to be written |
Definition at line 54 of file vme/vmeio.c.
00055 { 00056 mvme_set_am(myvme, MVME_AM_A24_ND); 00057 mvme_set_dmode(myvme, MVME_DMODE_D32); 00058 mvme_write_value(myvme, base+VMEIO_OUTLATCH, data & 0xFFFFFF); 00059 }
int vmeio_CsrRead | ( | MVME_INTERFACE * | myvme, | |
DWORD | base | |||
) |
Read the CSR register
myvme | vme structure | |
base | VMEIO base address |
Definition at line 68 of file vme/vmeio.c.
00069 { 00070 int csr; 00071 mvme_set_am(myvme, MVME_AM_A24_ND); 00072 mvme_set_dmode(myvme, MVME_DMODE_D32); 00073 csr = mvme_read_value(myvme, base+VMEIO_RDCNTL); 00074 return (csr & 0xFF); 00075 }
void vmeio_IntEnable | ( | MVME_INTERFACE * | myvme, | |
DWORD | base, | |||
int | input | |||
) |
Enable Interrupt source. Only any of the first 8 inputs can generate interrupt.
myvme | vme structure | |
base | VMEIO base address | |
input | inputs 0..7 (LSB) |
Definition at line 132 of file vme/vmeio.c.
00133 { 00134 mvme_set_am(myvme, MVME_AM_A24_ND); 00135 mvme_set_dmode(myvme, MVME_DMODE_D32); 00136 mvme_write_value(myvme, base+VMEIO_IRQENBL, input); 00137 }
void vmeio_IntRearm | ( | MVME_INTERFACE * | myvme, | |
DWORD | base, | |||
int | input | |||
) |
Select Interrupt source and arm interrupt The CSR should be reset before this operation. In Sync mode the strobe and the input have to be in coincidence. In Async mode a logical level on the input will trigger the interrupt.
myvme | vme structure | |
base | VMEIO base address | |
input | inputs 0..7 if 1=> Sync, 0=> Async |
Definition at line 150 of file vme/vmeio.c.
00151 { 00152 mvme_set_am(myvme, MVME_AM_A24_ND); 00153 mvme_set_dmode(myvme, MVME_DMODE_D32); 00154 mvme_write_value(myvme, base+VMEIO_INTSRC, input); 00155 }
void vmeio_OutputSet | ( | MVME_INTERFACE * | myvme, | |
DWORD | base, | |||
DWORD | data | |||
) |
Set output in pulse mode
myvme | vme structure | |
base | VMEIO base address | |
data | data to be written |
Definition at line 24 of file vme/vmeio.c.
00025 { 00026 mvme_set_am(myvme, MVME_AM_A24_ND); 00027 mvme_set_dmode(myvme, MVME_DMODE_D32); 00028 mvme_write_value(myvme, base+VMEIO_OUTSET, data & 0xFFFFFF); 00029 }
void vmeio_StrobeClear | ( | MVME_INTERFACE * | myvme, | |
DWORD | base | |||
) |
Clear Strobe input
myvme | vme structure | |
base | VMEIO base address |
Definition at line 116 of file vme/vmeio.c.
00117 { 00118 mvme_set_am(myvme, MVME_AM_A24_ND); 00119 mvme_set_dmode(myvme, MVME_DMODE_D32); 00120 mvme_write_value(myvme, base+VMEIO_RDCNTL, 0); 00121 }
int vmeio_SyncRead | ( | MVME_INTERFACE * | myvme, | |
DWORD | base | |||
) |
Read from the Sync register
myvme | vme structure | |
base | VMEIO base address |
Definition at line 100 of file vme/vmeio.c.
00101 { 00102 int csr; 00103 mvme_set_am(myvme, MVME_AM_A24_ND); 00104 mvme_set_dmode(myvme, MVME_DMODE_D32); 00105 csr = mvme_read_value(myvme, base+VMEIO_RDSYNC); 00106 return (csr & 0xFFFFFF); 00107 }
void vmeio_SyncWrite | ( | MVME_INTERFACE * | myvme, | |
DWORD | base, | |||
DWORD | data | |||
) |
Write to the sync output (pulse mode)
myvme | vme structure | |
base | VMEIO base address | |
data | data to be written |
Definition at line 39 of file vme/vmeio.c.
00040 { 00041 mvme_set_am(myvme, MVME_AM_A24_ND); 00042 mvme_set_dmode(myvme, MVME_DMODE_D32); 00043 mvme_write_value(myvme, base+VMEIO_OUTPULSE, data & 0xFFFFFF); 00044 }