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Defines | |
#define | INLINE |
#define | EXTERNAL extern |
#define | A32D24 0xf0000000 |
#define | ENABLE_INT 0x00 |
#define | SET_INT_SYNC 0x01 |
#define | SET_PULSE 0x02 |
#define | WRITE_PULSE 0x03 |
#define | WRITE_LATCH 0x04 |
#define | READ_SYNC 0x05 |
#define | READ_ASYNC 0x06 |
#define | READ_STATUS 0x07 |
#define | CLEAR_VMEIO 0x07 |
#define | VMEIO_VECT_BASE 0x7f |
Typedefs | |
typedef unsigned short int | WORD |
typedef unsigned long int | DWORD |
Functions | |
void | myStub (void) |
void | vmeio (void) |
void | vmeio_intsync_set (DWORD base_adr, DWORD pattern) |
void | vmeio_pulse_set (const DWORD base_adr, DWORD pattern) |
void | vmeio_sync_read (const DWORD base_adr, DWORD *data) |
void | vmeio_async_read (const DWORD base_adr, DWORD *data) |
void | vmeio_pulse_write (const DWORD base_adr, DWORD data) |
void | vmeio_latch_write (const DWORD base_adr, DWORD data) |
void | vmeio_clear (const DWORD base_adr) |
void | vmeio_status_read (const DWORD base_adr, DWORD *data) |
void | vmeio_int_clear (const DWORD base_adr) |
void | vmeio_int_enable (const DWORD base_adr, int intnum) |
void | vmeio_int_disable (const DWORD base_adr, int intnum) |
void | vmeio_int_attach (const DWORD base_adr, DWORD base_vect, int intnum, void(*isr)(void)) |
void | vmeio_int_detach (const DWORD base_adr, DWORD base_vect, int intnum) |
#define A32D24 0xf0000000 |
Definition at line 59 of file divers/vmeio.h.
#define CLEAR_VMEIO 0x07 |
#define ENABLE_INT 0x00 |
Definition at line 62 of file divers/vmeio.h.
Referenced by vmeio_int_disable(), and vmeio_int_enable().
#define EXTERNAL extern |
Definition at line 41 of file divers/vmeio.h.
#define INLINE |
Definition at line 38 of file divers/vmeio.h.
#define READ_ASYNC 0x06 |
#define READ_STATUS 0x07 |
Definition at line 69 of file divers/vmeio.h.
Referenced by vmeio_status_read(), and vmeio_sync_read().
#define READ_SYNC 0x05 |
#define SET_INT_SYNC 0x01 |
#define SET_PULSE 0x02 |
#define VMEIO_VECT_BASE 0x7f |
Definition at line 72 of file divers/vmeio.h.
#define WRITE_LATCH 0x04 |
#define WRITE_PULSE 0x03 |
typedef unsigned long int DWORD |
Definition at line 51 of file divers/vmeio.h.
typedef unsigned short int WORD |
Definition at line 46 of file divers/vmeio.h.
void myStub | ( | void | ) |
void vmeio | ( | void | ) |
Definition at line 309 of file divers/vmeio.c.
00310 { 00311 printf("\n---> vmeIO Triumf board 24bit in/out latch/pulse + 8 interrupts <---\n"); 00312 printf("Inline: vmeio_intsync_set (base, pattern) : set interrupt source\n"); 00313 printf("Inline: vmeio_pulse_set (base, pattern) : set output pulse\n"); 00314 printf("Inline: vmeio_sync_read (base, *data) : read sync input\n"); 00315 printf("Inline: vmeio_async_read (base, *data) : read Async input\n"); 00316 printf("Inline: vmeio_pulse_write (base, data) : write pulse output\n"); 00317 printf("Inline: vmeio_latch_write (base, data) : write latch output\n"); 00318 printf("Inline: vmeio_clear (base) : clear strobe\n"); 00319 printf("Inline: vmeio_status_read (base, *status) : read status register\n"); 00320 printf("Inline: vmeio_int_clear (base) : clear interrupts\n"); 00321 printf("Inline: vmeio_int_enable (base, int#) : enable interrupt (0:7)\n"); 00322 printf("Inline: vmeio_int_disable (base, int#) : disable interrupt (0:7)\n"); 00323 printf("Inline: vmeio_int_enable (base, int#) : enable interrupt (0:7)\n"); 00324 printf("Inline: vmeio_int_attach (base, vec, int#, isr) : interrupt (0:7)\n"); 00325 printf("Inline: vmeio_int_detach (base, vect, int#) : interrupt (0:7)\n"); 00326 printf("Test : vmeio_Status_read (0x780000) : display status\n"); 00327 printf("Test : vmeio_Async_read (0x780000) : read Async\n"); 00328 printf("Test : vmeio_Sync_read (0x780000) : read sync\n"); 00329 printf("Test : vmeio_Pulse_write (0x780000, : write pulse\n"); 00330 printf("Test : vmeio_Latch_write (0x780000, : write latch\n"); 00331 printf("Test : vmeio_Clear (0x780000) : clear VMEIO\n"); 00332 printf("Test : Interrupt : VMEIO_BASE: 0x780000, VMEIO_VECT_BASE: 0x7F\n"); 00333 printf("Test : The interrupt test is based on the following configuration:\n"); 00334 printf(" Output 0 -> strobe\n"); 00335 printf(" Output 1 -> Input 0\n"); 00336 printf(" Output 2 -> Input 1\n"); 00337 printf(" Output 3 -> Input 2\n"); 00338 printf(" vmeio_attach_async_interrupt(1) will enable I1\n"); 00339 printf(" vmeio_gen_async(1) will generate int in I1\n"); 00340 printf(" or vmeio_attach_sync_interrupt(1) will enable I1\n"); 00341 printf(" vmeio_gen_sync(1) will generate int in I1\n"); 00342 printf("Test : vmeio_attach_async_interrupt( x...): attach, enable Int#\n"); 00343 printf("Test : vmeio_attach_sync_interrupt( x...) : attach, enable Int#\n"); 00344 printf("Test : vmeio_detach_interrupt( x...) : detach, enable Int#\n"); 00345 printf("Test : vmeio_gen_async( x) : generate a Async int\n"); 00346 printf("Test : vmeio_gen_sync( x) : generate a sync int\n"); 00347 }
Definition at line 102 of file divers/vmeio.c.
Referenced by vmeio_Async_read().
00104 : read VMEIO async input data 00105 Input: 00106 DWORD * base_addr : base address of the VMEIO 00107 DWORD * data : data to be read 00108 Output: 00109 none 00110 Function value: 00111 none 00112 \**************************************************************/ 00113 { 00114 volatile DWORD *spec_adr; 00115 00116 spec_adr = (DWORD *) (A32D24 + base_adr) + (READ_ASYNC); 00117 *data = (*spec_adr & 0xffffff); 00118 }
void vmeio_clear | ( | const DWORD | base_adr | ) |
Definition at line 165 of file divers/vmeio.c.
Referenced by vmeio_Clear(), and vmeio_gen_sync().
00167 : clear the status reg (strobe) 00168 Input: 00169 DWORD * base_addr : base address of the VMEIO 00170 Output: 00171 none 00172 Function value: 00173 none 00174 \**************************************************************/ 00175 { 00176 volatile DWORD *spec_adr; 00177 00178 /* status : Check first if trigger has been received */ 00179 spec_adr = (DWORD *) (A32D24 + base_adr) + (CLEAR_VMEIO); 00180 *spec_adr = 0x0; 00181 }
Definition at line 257 of file divers/vmeio.c.
Referenced by vmeio_attach_async_interrupt(), and vmeio_attach_sync_interrupt().
00260 : Book an ISR for a bitwise set of interrupt input (0xff). 00261 The interrupt vector is then the VECTOR_BASE+intnum 00262 Input: 00263 DWORD * base_addr : base address of the VMEIO 00264 DWORD base_vect : base vector of the module 00265 DWORD intnum : interrupt number (0:7) 00266 DWORD isr_routine : interrupt routine pointer 00267 Output: 00268 none 00269 Function value: 00270 none 00271 \**************************************************************/ 00272 { 00273 vmeio_int_clear(base_adr); /* clear any pending front panel interrupts */ 00274 vmeio_int_disable(base_adr, intnum); /* bitwise input */ 00275 #ifdef OS_VXWORKS 00276 if (intnum < 8) 00277 intConnect(INUM_TO_IVEC(base_vect + intnum), (VOIDFUNCPTR) isr, intnum); 00278 #else 00279 printf("vector : 0x%x\n", base_vect + intnum); 00280 #endif 00281 vmeio_int_enable(base_adr, intnum); /* bitwise input */ 00282 }
void vmeio_int_clear | ( | const DWORD | base_adr | ) |
Definition at line 204 of file divers/vmeio.c.
Referenced by vmeio_int_attach(), and vmeio_int_detach().
00205 { 00206 volatile DWORD *spec_adr; 00207 00208 /* status : Check first if trigger has been received */ 00209 spec_adr = (DWORD *) (A32D24 + base_adr) + (CLEAR_VMEIO); 00210 *spec_adr = 0x0; 00211 }
Definition at line 284 of file divers/vmeio.c.
Referenced by vmeio_detach_interrupt().
00286 : Unbook an ISR for a bitwise set of interrupt input (0xff). 00287 The interrupt vector is then the VECTOR_BASE+intnum 00288 Input: 00289 DWORD * base_addr : base address of the VMEIO 00290 DWORD base_vect : base vector of the module 00291 DWORD intnum : interrupt number (0:7) 00292 Output: 00293 none 00294 Function value: 00295 none 00296 \**************************************************************/ 00297 { 00298 vmeio_int_clear(base_adr); /* clear any pending front panel interrupts */ 00299 vmeio_int_disable(base_adr, intnum); /* mask off external interrupt x */ 00300 #ifdef OS_VXWORKS 00301 if (intnum < 8) 00302 intConnect(INUM_TO_IVEC(base_vect + intnum), (VOIDFUNCPTR) myStub, intnum); 00303 #else 00304 printf("vector : 0x%x\n", base_vect + intnum); 00305 #endif 00306 }
void vmeio_int_disable | ( | const DWORD | base_adr, | |
int | intnum | |||
) |
Definition at line 235 of file divers/vmeio.c.
Referenced by vmeio_attach_async_interrupt(), vmeio_attach_sync_interrupt(), vmeio_detach_interrupt(), vmeio_int_attach(), and vmeio_int_detach().
00237 : Disable the interrupt for the bitwise input intnum (0xff). 00238 The interrupt vector is then the VECTOR_BASE+intnum 00239 Input: 00240 DWORD * base_addr : base address of the VMEIO 00241 DWORD * intnum : interrupt number (input 0:7) 00242 Output: 00243 none 00244 Function value: 00245 none 00246 \**************************************************************/ 00247 { 00248 volatile DWORD *spec_adr; 00249 00250 #ifdef OS_VXWORKS 00251 sysIntDisable(7); /* interrupt level 7 */ 00252 #endif 00253 spec_adr = (DWORD *) (A32D24 + base_adr) + (ENABLE_INT); 00254 *spec_adr = ~(intnum & 0xff); 00255 }
void vmeio_int_enable | ( | const DWORD | base_adr, | |
int | intnum | |||
) |
Definition at line 213 of file divers/vmeio.c.
Referenced by vmeio_attach_async_interrupt(), vmeio_attach_sync_interrupt(), and vmeio_int_attach().
00215 : Enable the interrupt for the bitwise input intnum (0xff). 00216 The interrupt vector is then the VECTOR_BASE+intnum 00217 Input: 00218 DWORD * base_addr : base address of the VMEIO 00219 DWORD * intnum : interrupt number (input 0:7) 00220 Output: 00221 none 00222 Function value: 00223 none 00224 \**************************************************************/ 00225 { 00226 volatile DWORD *spec_adr; 00227 00228 spec_adr = (DWORD *) (A32D24 + base_adr) + (ENABLE_INT); 00229 *spec_adr = (intnum & 0xff); 00230 #ifdef OS_VXWORKS 00231 sysIntEnable(7); /* interrupt level 7 */ 00232 #endif 00233 }
Definition at line 33 of file divers/vmeio.c.
Referenced by vmeio_attach_async_interrupt(), vmeio_attach_sync_interrupt(), and vmeio_gen_async().
00035 : Set VMEIO interrupt source to be sync mode. 00036 Each bit refers to an input (0:7) 00037 If not set the interrupt source is Async 00038 Input: 00039 DWORD * base_addr : base address of the VMEIO 00040 DWORD pattern : data to be applied to board 00041 Output: 00042 none 00043 Function value: 00044 none 00045 \**************************************************************/ 00046 { 00047 volatile DWORD *spec_adr; 00048 00049 spec_adr = (DWORD *) (A32D24 + base_adr) + (SET_INT_SYNC); 00050 *spec_adr = (pattern & 0xf); 00051 }
Definition at line 143 of file divers/vmeio.c.
Referenced by vmeio_Latch_write().
00145 : write to VMEIO latch output. 00146 only the latch enable channels will be affected 00147 Each bit correspond to a output (0:23) 00148 Input: 00149 DWORD * base_addr : base address of the VMEIO 00150 DWORD data : data to write 00151 Output: 00152 none 00153 Function value: 00154 none 00155 \**************************************************************/ 00156 { 00157 volatile DWORD *spec_adr; 00158 00159 /* status : Check first if trigger has been received */ 00160 spec_adr = (DWORD *) (A32D24 + base_adr) + (WRITE_LATCH); 00161 *spec_adr = (data & 0xffffff); 00162 }
Definition at line 54 of file divers/vmeio.c.
Referenced by vmeio_attach_async_interrupt(), and vmeio_attach_sync_interrupt().
00056 : Set VMEIO output channel pattern to be pulse mode 00057 Each bit refers to an output (0:23) 00058 If not set the output is latch mode 00059 Input: 00060 DWORD * base_addr : base address of the VMEIO 00061 DWORD pattern : data to be applied to board 00062 Output: 00063 none 00064 Function value: 00065 none 00066 \**************************************************************/ 00067 { 00068 volatile DWORD *spec_adr; 00069 00070 spec_adr = (DWORD *) (A32D24 + base_adr) + (SET_PULSE); 00071 *spec_adr = (pattern & 0xffffff); 00072 }
Definition at line 121 of file divers/vmeio.c.
Referenced by vmeio_Pulse_write().
00123 : write to VMEIO pulse output. 00124 only the pulse enable channels will be affected 00125 Each bit correspond to a output (0:23) 00126 Input: 00127 DWORD * base_addr : base address of the VMEIO 00128 DWORD data : data to write 00129 Output: 00130 none 00131 Function value: 00132 none 00133 \**************************************************************/ 00134 { 00135 DWORD *spec_adr; 00136 00137 /* status : Check first if trigger has been received */ 00138 spec_adr = (DWORD *) (A32D24 | base_adr) + (WRITE_PULSE); 00139 *spec_adr = (data & 0xffffff); 00140 }
Definition at line 184 of file divers/vmeio.c.
Referenced by vmeio_Status_read().
00186 : read the status register. 00187 contains the strobe bit (0x1), the interrupt level (0x70) 00188 Input: 00189 DWORD * base_addr : base address of the VMEIO 00190 DWORD * data : status 00191 Output: 00192 none 00193 Function value: 00194 none 00195 \**************************************************************/ 00196 { 00197 volatile DWORD *spec_adr; 00198 00199 spec_adr = (DWORD *) (A32D24 + base_adr) + (READ_STATUS); 00200 *data = (*spec_adr & 0xff); 00201 }
Definition at line 75 of file divers/vmeio.c.
Referenced by vmeio_Sync_read().
00077 : read VMEIO sync input data if gate received 00078 Input: 00079 DWORD * base_addr : base address of the VMEIO 00080 DWORD * data : data to be read 00081 Output: 00082 none 00083 Function value: 00084 none 00085 \**************************************************************/ 00086 { 00087 volatile DWORD *spec_adr; 00088 DWORD status; 00089 00090 /* status : Check first if trigger has been received */ 00091 spec_adr = (DWORD *) (A32D24 + base_adr) + (READ_STATUS); 00092 status = *spec_adr; 00093 status &= 0xf; 00094 if (status != 0) { 00095 spec_adr = (DWORD *) (A32D24 + base_adr) + (READ_SYNC); 00096 *data = (*spec_adr & 0xffffff); 00097 } else 00098 *data = 0x80000000; 00099 }