v1720.c

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00001 /*********************************************************************
00002 
00003   Name:         v1720.c
00004   Created by:   Pierre-A. Amaudruz / K.Olchanski
00005 
00006   Contents:     V1720 8 ch. 12bit 250Msps
00007  
00008   $Id: v1720.c 4728 2010-05-12 05:34:44Z svn $
00009 *********************************************************************/
00010 #include <stdio.h>
00011 #include <stdint.h>
00012 #include <string.h>
00013 #include "v1720drv.h"
00014 #include "mvmestd.h"
00015 
00016 // Buffer organization map for number of samples
00017 uint32_t V1720_NSAMPLES_MODE[11] = { (1<<20), (1<<19), (1<<18), (1<<17), (1<<16), (1<<15)
00018                                ,(1<<14), (1<<13), (1<<12), (1<<11), (1<<10)};
00019 
00020 /*****************************************************************/
00021 /*
00022 Read V1720 register value
00023 */
00024 static uint32_t regRead(MVME_INTERFACE *mvme, uint32_t base, int offset)
00025 {
00026   mvme_set_am(mvme, MVME_AM_A32);
00027   mvme_set_dmode(mvme, MVME_DMODE_D32);
00028   return mvme_read_value(mvme, base + offset);
00029 }
00030 
00031 /*****************************************************************/
00032 /*
00033 Write V1720 register value
00034 */
00035 static void regWrite(MVME_INTERFACE *mvme, uint32_t base, int offset, uint32_t value)
00036 {
00037   mvme_set_am(mvme, MVME_AM_A32);
00038   mvme_set_dmode(mvme, MVME_DMODE_D32);
00039   mvme_write_value(mvme, base + offset, value);
00040 }
00041 
00042 /*****************************************************************/
00043 uint32_t v1720_RegisterRead(MVME_INTERFACE *mvme, uint32_t base, int offset)
00044 {
00045   return regRead(mvme, base, offset);
00046 }
00047 
00048 /*****************************************************************/
00049 void v1720_RegisterWrite(MVME_INTERFACE *mvme, uint32_t base, int offset, uint32_t value)
00050 {
00051   regWrite(mvme, base, offset, value);
00052 }
00053 
00054 /*****************************************************************/
00055 void v1720_Reset(MVME_INTERFACE *mvme, uint32_t base)
00056 {
00057   regWrite(mvme, base, V1720_SW_RESET, 0);
00058 }
00059 
00060 /*****************************************************************/
00061 void v1720_TrgCtl(MVME_INTERFACE *mvme, uint32_t base, uint32_t reg, uint32_t mask)
00062 {
00063   regWrite(mvme, base, reg, mask);
00064 }
00065 
00066 /*****************************************************************/
00067 void v1720_ChannelCtl(MVME_INTERFACE *mvme, uint32_t base, uint32_t reg, uint32_t mask)
00068 {
00069   regWrite(mvme, base, reg, mask);
00070 }
00071 
00072 /*****************************************************************/
00073 void v1720_ChannelSet(MVME_INTERFACE *mvme, uint32_t base, uint32_t channel, uint32_t what, uint32_t that)
00074 {
00075   uint32_t reg, mask;
00076 
00077   if (what == V1720_CHANNEL_THRESHOLD)   mask = 0x0FFF;
00078   if (what == V1720_CHANNEL_OUTHRESHOLD) mask = 0x0FFF;
00079   if (what == V1720_CHANNEL_DAC)         mask = 0xFFFF;
00080   reg = what | (channel << 8);
00081   printf("base:0x%x reg:0x%x, this:%x\n", base, reg, that);
00082   regWrite(mvme, base, reg, (that & 0xFFF));
00083 }
00084 
00085 /*****************************************************************/
00086 uint32_t v1720_ChannelGet(MVME_INTERFACE *mvme, uint32_t base, uint32_t channel, uint32_t what)
00087 {
00088   uint32_t reg, mask;
00089 
00090   if (what == V1720_CHANNEL_THRESHOLD)   mask = 0x0FFF;
00091   if (what == V1720_CHANNEL_OUTHRESHOLD) mask = 0x0FFF;
00092   if (what == V1720_CHANNEL_DAC)         mask = 0xFFFF;
00093   reg = what | (channel << 8);
00094   return regRead(mvme, base, reg);
00095 }
00096 
00097 /*****************************************************************/
00098 void v1720_ChannelThresholdSet(MVME_INTERFACE *mvme, uint32_t base, uint32_t channel, uint32_t threshold)
00099 {
00100   uint32_t reg;
00101   reg = V1720_CHANNEL_THRESHOLD | (channel << 8);
00102   printf("base:0x%x reg:0x%x, threshold:%x\n", base, reg, threshold);
00103   regWrite(mvme, base, reg, (threshold & 0xFFF));
00104 }
00105 
00106 /*****************************************************************/
00107 void v1720_ChannelOUThresholdSet(MVME_INTERFACE *mvme, uint32_t base, uint32_t channel, uint32_t threshold)
00108 {
00109   uint32_t reg;
00110   reg = V1720_CHANNEL_OUTHRESHOLD | (channel << 8);
00111   printf("base:0x%x reg:0x%x, outhreshold:%x\n", base, reg, threshold);
00112   regWrite(mvme, base, reg, (threshold & 0xFFF));
00113 }
00114 
00115 /*****************************************************************/
00116 void v1720_ChannelDACSet(MVME_INTERFACE *mvme, uint32_t base, uint32_t channel, uint32_t dac)
00117 {
00118   uint32_t reg;
00119 
00120   reg = V1720_CHANNEL_DAC | (channel << 8);
00121   printf("base:0x%x reg:0x%x, DAC:%x\n", base, reg, dac);
00122   regWrite(mvme, base, reg, (dac & 0xFFFF));
00123 }
00124 
00125 /*****************************************************************/
00126 int v1720_ChannelDACGet(MVME_INTERFACE *mvme, uint32_t base, uint32_t channel, uint32_t *dac)
00127 {
00128   uint32_t reg;
00129   int   status;
00130 
00131   reg = V1720_CHANNEL_DAC | (channel << 8);
00132   *dac = regRead(mvme, base, reg);
00133   reg = V1720_CHANNEL_STATUS | (channel << 8);
00134   status = regRead(mvme, base, reg);
00135   return status;
00136 }
00137 
00138 /*****************************************************************/
00139 void v1720_Align64Set(MVME_INTERFACE *mvme, uint32_t base)
00140 {
00141   regWrite(mvme, base, V1720_VME_CONTROL, V1720_ALIGN64);
00142 }
00143 
00144 /*****************************************************************/
00145 void v1720_AcqCtl(MVME_INTERFACE *mvme, uint32_t base, uint32_t operation)
00146 {
00147   uint32_t reg;
00148   
00149   reg = regRead(mvme, base, V1720_ACQUISITION_CONTROL);  
00150   switch (operation) {
00151   case V1720_RUN_START:
00152     regWrite(mvme, base, V1720_ACQUISITION_CONTROL, (reg | 0x4));
00153     break;
00154   case V1720_RUN_STOP:
00155     regWrite(mvme, base, V1720_ACQUISITION_CONTROL, (reg & ~(0x4)));
00156     break;
00157   case V1720_REGISTER_RUN_MODE:
00158     regWrite(mvme, base, V1720_ACQUISITION_CONTROL, (reg & ~(0x3)));
00159     break;
00160   case V1720_SIN_RUN_MODE:
00161     regWrite(mvme, base, V1720_ACQUISITION_CONTROL, (reg | 0x01));
00162     break;
00163   case V1720_SIN_GATE_RUN_MODE:
00164     regWrite(mvme, base, V1720_ACQUISITION_CONTROL, (reg | 0x02));
00165     break;
00166   case V1720_MULTI_BOARD_SYNC_MODE:
00167     regWrite(mvme, base, V1720_ACQUISITION_CONTROL, (reg | 0x03));
00168     break;
00169   case V1720_COUNT_ACCEPTED_TRIGGER:
00170     regWrite(mvme, base, V1720_ACQUISITION_CONTROL, (reg | 0x08));
00171     break;
00172   case V1720_COUNT_ALL_TRIGGER:
00173     regWrite(mvme, base, V1720_ACQUISITION_CONTROL, (reg & ~(0x08)));
00174     break;
00175   default:
00176     break;
00177   }
00178 }
00179 
00180 /*****************************************************************/
00181 void v1720_info(MVME_INTERFACE *mvme, uint32_t base, int *nchannels, uint32_t *n32word)
00182 {
00183   int i, chanmask;
00184 
00185   // Evaluate the event size
00186   // Number of samples per channels
00187   *n32word = V1720_NSAMPLES_MODE[regRead(mvme, base, V1720_BUFFER_ORGANIZATION)];
00188 
00189   // times the number of active channels
00190   chanmask = 0xff & regRead(mvme, base, V1720_CHANNEL_EN_MASK); 
00191   *nchannels = 0;
00192   for (i=0;i<8;i++) {
00193     if (chanmask & (1<<i))
00194       *nchannels += 1;
00195   }
00196 
00197   *n32word *= *nchannels;
00198   *n32word /= 2;   // 2 samples per 32bit word
00199   *n32word += 4;   // Headers
00200 }
00201 
00202 /*****************************************************************/
00203 uint32_t v1720_BufferOccupancy(MVME_INTERFACE *mvme, uint32_t base, uint32_t channel)
00204 {
00205   uint32_t reg;
00206   reg = V1720_BUFFER_OCCUPANCY + (channel<<16);
00207   return regRead(mvme, base, reg);
00208 }
00209 
00210 
00211 /*****************************************************************/
00212 uint32_t v1720_BufferFree(MVME_INTERFACE *mvme, uint32_t base, int nbuffer)
00213 {
00214   int mode;
00215 
00216   mode = regRead(mvme, base, V1720_BUFFER_ORGANIZATION);
00217   if (nbuffer <= (1<< mode) ) {
00218     regWrite(mvme, base, V1720_BUFFER_FREE, nbuffer);
00219     return mode;
00220   } else
00221     return mode;
00222 }
00223 
00224 /*****************************************************************/
00225 uint32_t v1720_BufferFreeRead(MVME_INTERFACE *mvme, uint32_t base)
00226 {
00227   return regRead(mvme, base, V1720_BUFFER_FREE);
00228 }
00229 
00230 /*****************************************************************/
00231 uint32_t v1720_DataRead(MVME_INTERFACE *mvme, uint32_t base, uint32_t *pdata, uint32_t n32w)
00232 {
00233   uint32_t i;
00234 
00235   for (i=0;i<n32w;i++) {
00236     *pdata = regRead(mvme, base, V1720_EVENT_READOUT_BUFFER);
00237     if (*pdata != 0xffffffff)
00238       pdata++;
00239     else
00240       break;
00241   }
00242   return i;
00243 }
00244 
00245 /********************************************************************/
00246 /** v1720_DataBlockRead
00247 Read N entries (32bit) 
00248 @param mvme vme structure
00249 @param base  base address
00250 @param pdest Destination pointer
00251 @return nentry
00252 */
00253 uint32_t v1720_DataBlockRead(MVME_INTERFACE *mvme, uint32_t base, uint32_t *pdest, uint32_t *nentry)
00254 {
00255   int status;
00256 
00257   mvme_set_am(  mvme, MVME_AM_A32);
00258   mvme_set_dmode(  mvme, MVME_DMODE_D32);
00259   mvme_set_blt(  mvme, MVME_BLT_MBLT64);
00260   //  mvme_set_blt(  mvme, MVME_BLT_BLT32);
00261   //mvme_set_blt(  mvme, 0);
00262 
00263   // Transfer in MBLT64 (8bytes), nentry is in 32bits(VF48)
00264   // *nentry * 8 / 2
00265   status = mvme_read(mvme, pdest, base+V1720_EVENT_READOUT_BUFFER, *nentry<<2);
00266   if (status != MVME_SUCCESS)
00267     return 0;
00268 
00269   return (*nentry);
00270 }
00271 
00272 
00273 /*****************************************************************/
00274 void  v1720_Status(MVME_INTERFACE *mvme, uint32_t base)
00275 {
00276   printf("================================================\n");
00277   printf("V1720 at A32 0x%x\n", (int)base);
00278   printf("Board ID             : 0x%x\n", regRead(mvme, base, V1720_BOARD_ID));
00279   printf("Board Info           : 0x%x\n", regRead(mvme, base, V1720_BOARD_INFO));
00280   printf("Acquisition status   : 0x%8.8x\n", regRead(mvme, base, V1720_ACQUISITION_STATUS));
00281   printf("================================================\n");
00282 }
00283 
00284 /*****************************************************************/
00285 /**
00286 Sets all the necessary paramters for a given configuration.
00287 The configuration is provided by the mode argument.
00288 Add your own configuration in the case statement. Let me know
00289 your setting if you want to include it in the distribution.
00290 - <b>Mode 1</b> : 
00291 
00292 @param *mvme VME structure
00293 @param  base Module base address
00294 @param mode  Configuration mode number
00295 @return 0: OK. -1: Bad
00296 */
00297 int  v1720_Setup(MVME_INTERFACE *mvme, uint32_t base, int mode)
00298 {
00299   switch (mode) {
00300   case 0x0:
00301     printf("--------------------------------------------\n");
00302     printf("Setup Skip\n");
00303     printf("--------------------------------------------\n");
00304   case 0x1:
00305     printf("--------------------------------------------\n");
00306     printf("Trigger from FP, 8ch, 1Ks, postTrigger 800\n");
00307     printf("--------------------------------------------\n");
00308     regWrite(mvme, base, V1720_BUFFER_ORGANIZATION,  0x0A);    // 1K buffer
00309     regWrite(mvme, base, V1720_TRIG_SRCE_EN_MASK,    0x4000);  // External Trigger
00310     regWrite(mvme, base, V1720_CHANNEL_EN_MASK,      0xFF);    // 8ch enable
00311     regWrite(mvme, base, V1720_POST_TRIGGER_SETTING, 800);     // PreTrigger (1K-800)
00312     regWrite(mvme, base, V1720_ACQUISITION_CONTROL,   0x00);   // Reset Acq Control
00313     printf("\n");
00314     break;
00315   case 0x2:
00316     printf("--------------------------------------------\n");
00317     printf("Trigger from LEMO\n");
00318     printf("--------------------------------------------\n");
00319     regWrite(mvme, base, V1720_BUFFER_ORGANIZATION, 1);
00320     printf("\n");
00321     break;
00322   default:
00323     printf("Unknown setup mode\n");
00324     return -1;
00325   }
00326   v1720_Status(mvme, base);
00327   return 0;
00328 }
00329 
00330 /*****************************************************************/
00331 /*-PAA- For test purpose only */
00332 #ifdef MAIN_ENABLE
00333 int main (int argc, char* argv[]) {
00334 
00335   uint32_t V1720_BASE  = 0x32100000;
00336 
00337   MVME_INTERFACE *myvme;
00338 
00339   uint32_t data[100000], n32word, n32read;
00340   int status, channel, i, j, nchannels=0, chanmask;
00341 
00342   if (argc>1) {
00343     sscanf(argv[1],"%x", &V1720_BASE);
00344   }
00345 
00346   // Test under vmic
00347   status = mvme_open(&myvme, 0);
00348 
00349   v1720_Setup(myvme, V1720_BASE, 1);
00350   // Run control by register
00351   v1720_AcqCtl(myvme, V1720_BASE, REGISTER_RUN_MODE);
00352   // Soft or External trigger
00353   v1720_TrgCtl(myvme, V1720_BASE, V1720_TRIG_SRCE_EN_MASK     , V1720_SOFT_TRIGGER|V1720_EXTERNAL_TRIGGER);
00354   // Soft and External trigger output
00355   v1720_TrgCtl(myvme, V1720_BASE, V1720_FP_TRIGGER_OUT_EN_MASK, V1720_SOFT_TRIGGER|V1720_EXTERNAL_TRIGGER);
00356   // Enabled channels
00357   v1720_ChannelCtl(myvme, V1720_BASE, V1720_CHANNEL_EN_MASK, 0x3);
00358   //  sleep(1);
00359 
00360   channel = 0;
00361   // Start run then wait for trigger
00362   v1720_AcqCtl(myvme, V1720_BASE, RUN_START);
00363   sleep(1);
00364 
00365   //  regWrite(myvme, V1720_BASE, V1720_SW_TRIGGER, 1);
00366 
00367   // Evaluate the event size
00368   // Number of samples per channels
00369   n32word  =  1<<regRead(myvme, V1720_BASE, V1720_BUFFER_ORGANIZATION);
00370   // times the number of active channels
00371   chanmask = 0xff & regRead(myvme, V1720_BASE, V1720_CHANNEL_EN_MASK); 
00372   for (i=0;i<8;i++) 
00373     if (chanmask & (1<<i))
00374       nchannels++;
00375   printf("chanmask : %x , nchannels:  %d\n", chanmask, nchannels);
00376   n32word *= nchannels;
00377   n32word /= 2;   // 2 samples per 32bit word
00378   n32word += 4;   // Headers
00379   printf("n32word:%d\n", n32word);
00380 
00381   printf("Occupancy for channel %d = %d\n", channel, v1720_BufferOccupancy(myvme, V1720_BASE, channel)); 
00382 
00383   do {
00384     status = regRead(myvme, V1720_BASE, V1720_ACQUISITION_STATUS);
00385     printf("Acq Status1:0x%x\n", status);
00386   } while ((status & 0x8)==0);
00387   
00388   n32read = v1720_dataRead(myvme, V1720_BASE, &(data[0]), n32word);
00389   printf("n32read:%d\n", n32read);
00390   
00391   for (i=0; i<n32read;i+=4) {
00392     printf("[%d]:0x%x - [%d]:0x%x - [%d]:0x%x - [%d]:0x%x\n"
00393            , i, data[i], i+1, data[i+1], i+2, data[i+2], i+3, data[i+3]);
00394   }
00395   
00396   do {
00397     status = regRead(myvme, V1720_BASE, V1720_ACQUISITION_STATUS);
00398     printf("Acq Status2:0x%x\n", status);
00399   } while ((status & 0x8)==0);
00400   
00401   n32read = v1720_dataRead(myvme, V1720_BASE, &(data[0]), n32word);
00402   printf("n32read:%d\n", n32read);
00403   
00404   for (i=0; i<n32read;i+=4) {
00405     printf("[%d]:0x%x - [%d]:0x%x - [%d]:0x%x - [%d]:0x%x\n"
00406            , i, data[i], i+1, data[i+1], i+2, data[i+2], i+3, data[i+3]);
00407   }
00408   
00409   
00410   //  v1720_AcqCtl(myvme, V1720_BASE, RUN_STOP);
00411   
00412   regRead(myvme, V1720_BASE, V1720_ACQUISITION_CONTROL);
00413   status = mvme_close(myvme);
00414 
00415   return 1;
00416 
00417 }
00418 #endif
00419 
00420 /* emacs
00421  * Local Variables:
00422  * mode:C
00423  * mode:font-lock
00424  * tab-width: 8
00425  * c-basic-offset: 2
00426  * End:
00427  */
00428 
00429 //end

Midas DOC Version 3.0.0 ---- PSI Stefan Ritt ----
Contributions: Pierre-Andre Amaudruz - Sergio Ballestrero - Suzannah Daviel - Doxygen - Peter Green - Qing Gu - Greg Hackman - Gertjan Hofman - Paul Knowles - Exaos Lee - Rudi Meier - Glenn Moloney - Dave Morris - John M O'Donnell - Konstantin Olchanski - Renee Poutissou - Tamsen Schurman - Andreas Suter - Jan M.Wouters - Piotr Adam Zolnierczuk