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Defines | |
#define | V792_MAX_CHANNELS (WORD) 32 |
#define | V792_REG_BASE (WORD) (0x1000>>1) |
#define | V792_FIRM_REV (WORD) (0x1000>>1) |
#define | V792_GEO_ADDR_RW (WORD) (0x1002>>1) |
#define | V792_BIT_SET1_RW (WORD) (0x1006>>1) |
#define | V792_BIT_CLEAR1_WO (WORD) (0x1008>>1) |
#define | V792_SOFT_RESET (WORD) (0x1<<7) |
#define | V792_CSR1_RO (WORD) (0x100E>>1) |
#define | V792_SINGLE_RST_WO (WORD) (0x1016>>1) |
#define | V792_EVT_CNT_L_RO (WORD) (0x1024>>1) |
#define | V792_EVT_CNT_H_RO (WORD) (0x1026>>1) |
#define | V792_INCR_EVT_WO (WORD) (0x1028>>1) |
#define | V792_INCR_OFFSET_WO (WORD) (0x102A>>1) |
#define | V792_BIT_SET2_RW (WORD) (0x1032>>1) |
#define | V792_BIT_CLEAR2_WO (WORD) (0x1034>>1) |
#define | V792_TEST_EVENT_WO (WORD) (0x103E>>1) |
#define | V792_EVT_CNT_RST_WO (WORD) (0x1040>>1) |
#define | V792_THRES_BASE (WORD) (0x1080>>1) |
Functions | |
void | v792_EvtCntRead (WORD *pbase, DWORD *evtcnt) |
void | v792_CrateSet (WORD *pbase, DWORD *evtcnt) |
int | v792_DataRead (DWORD *base, DWORD *pdest, int *nentry) |
int | v792_EventRead (DWORD *base, DWORD *pdest, int *nentry) |
int | v792_ThresholdWrite (WORD *base, WORD *threshold, int *nitems) |
int | v792_DataReady (WORD *pbase) |
void | v792_SingleShotReset (WORD *pbase) |
void | v792_Status (WORD *pbase) |
int | v792_GeoWrite (WORD *pbase, int geo) |
#define V792_BIT_CLEAR1_WO (WORD) (0x1008>>1) |
Definition at line 23 of file caenv792.h.
Referenced by v792_BitSet2Clear(), v792_BitSet2Set(), and v792_SoftReset().
#define V792_BIT_CLEAR2_WO (WORD) (0x1034>>1) |
Definition at line 32 of file caenv792.h.
Referenced by v792_DataClear(), v792_LowThEnable(), and v792_OnlineSet().
#define V792_BIT_SET1_RW (WORD) (0x1006>>1) |
Definition at line 22 of file caenv792.h.
Referenced by v792_BitSet2Clear(), v792_BitSet2Set(), and v792_SoftReset().
#define V792_BIT_SET2_RW (WORD) (0x1032>>1) |
Definition at line 31 of file caenv792.h.
Referenced by v792_BitSet2Read(), v792_DataClear(), v792_EmptyEnable(), and v792_LowThDisable().
#define V792_CSR1_RO (WORD) (0x100E>>1) |
Definition at line 25 of file caenv792.h.
Referenced by v792_CSR1Read(), v792_DataReady(), v792_isBusy(), and v792_Status().
#define V792_EVT_CNT_H_RO (WORD) (0x1026>>1) |
#define V792_EVT_CNT_L_RO (WORD) (0x1024>>1) |
#define V792_EVT_CNT_RST_WO (WORD) (0x1040>>1) |
#define V792_FIRM_REV (WORD) (0x1000>>1) |
#define V792_GEO_ADDR_RW (WORD) (0x1002>>1) |
#define V792_INCR_EVT_WO (WORD) (0x1028>>1) |
Definition at line 29 of file caenv792.h.
#define V792_INCR_OFFSET_WO (WORD) (0x102A>>1) |
Definition at line 30 of file caenv792.h.
#define V792_MAX_CHANNELS (WORD) 32 |
Definition at line 18 of file caenv792.h.
Referenced by v792_Status(), v792_ThresholdRead(), and v792_ThresholdWrite().
#define V792_REG_BASE (WORD) (0x1000>>1) |
Definition at line 19 of file caenv792.h.
#define V792_SINGLE_RST_WO (WORD) (0x1016>>1) |
#define V792_SOFT_RESET (WORD) (0x1<<7) |
Definition at line 24 of file caenv792.h.
#define V792_TEST_EVENT_WO (WORD) (0x103E>>1) |
Definition at line 33 of file caenv792.h.
#define V792_THRES_BASE (WORD) (0x1080>>1) |
Definition at line 35 of file caenv792.h.
Referenced by v792_ThresholdRead(), and v792_ThresholdWrite().
Definition at line 41 of file caenv792.c.
00042 { 00043 int k; 00044 00045 *nentry = 0; 00046 if (v792_DataReady((WORD *)pbase)) { 00047 for (k=0 ; k<32 ; k++) { 00048 pdest[k] = pbase[k]; 00049 *nentry += 1; 00050 } 00051 } 00052 return *nentry; 00053 }
int v792_DataReady | ( | WORD * | pbase | ) |
Definition at line 85 of file caenv792.c.
00086 { 00087 //printf("data ready: 0x%08x\n",pbase[V792_CSR1_RO]); 00088 return (pbase[V792_CSR1_RO] & 0x1); 00089 }
Definition at line 19 of file caenv792.c.
00020 { 00021 DWORD hdata; 00022 00023 *nentry = 0; 00024 if (v792_DataReady((WORD *)pbase)) { 00025 do { 00026 hdata = *pbase; 00027 } while (!(hdata & 0x02000000)); // skip up to the header 00028 pdest[*nentry] = hdata; 00029 *nentry += 1; 00030 do { 00031 pdest[*nentry] = *pbase; 00032 *nentry += 1; 00033 } while (!(pdest[*nentry-1] & 0x04000000)); // copy until the trailer 00034 00035 nentry--; 00036 } 00037 return *nentry; 00038 }
Definition at line 72 of file caenv792.c.
00073 { 00074 *evtcnt = (pbase[V792_EVT_CNT_L_RO] 00075 + (DWORD) (0x10000 * pbase[V792_EVT_CNT_H_RO])); 00076 }
int v792_GeoWrite | ( | WORD * | pbase, | |
int | geo | |||
) |
Definition at line 112 of file caenv792.c.
00113 { 00114 pbase[V792_GEO_ADDR_RW] = (geo & 0x1F); 00115 return (int) (pbase[V792_GEO_ADDR_RW] & 0x1F); 00116 }
void v792_SingleShotReset | ( | WORD * | pbase | ) |
void v792_Status | ( | WORD * | pbase | ) |
Definition at line 92 of file caenv792.c.
00093 { 00094 int status; 00095 00096 printf("v792 Status for %p\n", pbase); 00097 status = pbase[V792_CSR1_RO]; 00098 printf("Amnesia: %s, ", status & 0x10 ? "Y" : "N"); 00099 printf("Term ON: %s, ", status & 0x40 ? "Y" : "N"); 00100 printf("TermOFF: %s\n", status & 0x80 ? "Y" : "N"); 00101 status = pbase[V792_FIRM_REV]; 00102 printf("Firmware: 0x%x\n",status); 00103 00104 if (pbase[V792_FIRM_REV] == 0xFFFF) 00105 { 00106 printf("v792 at %p: Invalid firmware revision: 0x%x\n",pbase,pbase[V792_FIRM_REV]); 00107 abort(); 00108 } 00109 }
Definition at line 56 of file caenv792.c.
00057 { 00058 int k; 00059 00060 for (k=0; k<V792_MAX_CHANNELS ; k++) { 00061 pbase[V792_THRES_BASE+k] = threshold[k] & 0x1FF; 00062 } 00063 00064 for (k=0; k<V792_MAX_CHANNELS ; k++) { 00065 threshold[k] = pbase[V792_THRES_BASE+k] & 0x1FF; 00066 } 00067 *nitems = V792_MAX_CHANNELS; 00068 return *nitems; 00069 }