vt48.c File Reference

Go to the source code of this file.

Functions

int vt48_EventRead (MVME_INTERFACE *myvme, DWORD base, DWORD *pdest, int *nentry)
void vt48_RegWrite (MVME_INTERFACE *mvme, DWORD base, DWORD reg, DWORD data)
void vt48_WindowSet (MVME_INTERFACE *mvme, DWORD base, float window)
void vt48_WindowOffsetSet (MVME_INTERFACE *mvme, DWORD base, float offset)
DWORD vt48_RegRead (MVME_INTERFACE *mvme, DWORD base, WORD reg)
void vt48_RegPrint (MVME_INTERFACE *mvme, DWORD base)
int vt48_Setup (MVME_INTERFACE *mvme, DWORD base, int mode)
void vt48_Status (MVME_INTERFACE *mvme, DWORD base)


Function Documentation

int vt48_EventRead ( MVME_INTERFACE myvme,
DWORD  base,
DWORD pdest,
int *  nentry 
)

Read one Event

Parameters:
myvme vme structure
base TF48 base address
pdest Destination pointer
entry return number of entry
Returns:
void

Definition at line 28 of file vt48.c.

00029 {
00030   int cmode, timeout, i, nwords, bfull, bempty;
00031   DWORD hdata = 0;
00032     
00033   mvme_get_dmode(myvme, &cmode);
00034   mvme_set_dmode(myvme, MVME_DMODE_D32);
00035 
00036   /*
00037   *nentry = mvme_read_value(myvme, base+VT48_OCCUPANCY_RO);
00038   printf ("nentry:%x\n", *nentry);
00039 
00040   *nentry &= 0xFFF;
00041   for (i=0 ; i<*nentry ; i++) {
00042     pdest[i] = mvme_read_value(myvme, base+VT48_DATA_FIFO);
00043   }
00044   */
00045 
00046   /*
00047   nwords = mvme_read_value(myvme, base+VT48_OCCUPANCY_RO);
00048   bempty = nwords & 0x4000;
00049   bfull = nwords & 0x8000;
00050   nwords &= 0xFFF;  
00051   */
00052   
00053   *nentry = 0;
00054   
00055   timeout=300;  
00056   do {
00057     timeout--;
00058     if (!(mvme_read_value(myvme, base+VT48_OCCUPANCY_RO) & 0x4000)) {   // Buffer Not Empty
00059       hdata = mvme_read_value(myvme, base+VT48_DATA_FIFO);
00060     }
00061   } while (!((hdata & 0xF0000000) == VT48_HEADER) && (timeout)); 
00062     
00063   if (timeout == 0) {
00064     *nentry = 0;
00065     //printf("timeout on header  data:0x%lx\n", hdata);
00066     mvme_set_dmode(myvme, cmode);
00067     return VT48_ERR_NODATA;
00068   }
00069 
00070   pdest[*nentry] = hdata;
00071   *nentry += 1;
00072   timeout=2000;
00073   do {
00074     timeout--;
00075     if (!(mvme_read_value(myvme, base+VT48_OCCUPANCY_RO) & 0x4000)) {   // Buffer Not Empty
00076       pdest[*nentry] = mvme_read_value(myvme, base+VT48_DATA_FIFO);
00077       *nentry += 1;
00078       timeout=2000;
00079     }
00080   } while (!((pdest[*nentry-1] & 0xF0000000) == VT48_TRAILER) && timeout); 
00081 
00082   if (timeout == 0) {
00083     printf("timeout on Trailer  data:0x%x\n", pdest[*nentry-1]);
00084     printf("nentry:%d data:0x%x base:0x%x \n", *nentry, pdest[*nentry], base+VT48_DATA_FIFO);
00085   }
00086   *nentry--;
00087     
00088   mvme_set_dmode(myvme, cmode);
00089   return (VT48_SUCCESS);
00090 }

void vt48_RegPrint ( MVME_INTERFACE mvme,
DWORD  base 
)

Definition at line 150 of file vt48.c.

00151 {
00152   int cmode, i, j;
00153   DWORD val1;
00154 
00155   mvme_get_dmode(mvme, &cmode);
00156   mvme_set_dmode(mvme, MVME_DMODE_D32);
00157   printf("vt48 Register\n");
00158   vt48_RegWrite(mvme, base, VT48_CMD_REG, VT48_AMT_CFG_RW);
00159   usleep(10000);
00160   
00161   for (i=0, j=0;i<15;i++,j+=4) {
00162     val1 = vt48_RegRead(mvme, base, VT48_CSR0_REG+j);
00163     printf("AMT Register CSR%2.2d: 0x%x \n", i, val1);
00164   }
00165   mvme_set_dmode(mvme, cmode);
00166 }

DWORD vt48_RegRead ( MVME_INTERFACE mvme,
DWORD  base,
WORD  reg 
)

Definition at line 135 of file vt48.c.

Referenced by vt48_RegPrint(), and vt48_Status().

00136 {
00137   int cmode;
00138   DWORD value;
00139 
00140   mvme_get_dmode(mvme, &cmode);
00141   mvme_set_dmode(mvme, MVME_DMODE_D32);
00142   value = mvme_read_value(mvme, base+reg);
00143   mvme_set_dmode(mvme, cmode);
00144   return value;
00145 }

void vt48_RegWrite ( MVME_INTERFACE mvme,
DWORD  base,
DWORD  reg,
DWORD  data 
)

Definition at line 95 of file vt48.c.

Referenced by vt48_RegPrint(), vt48_Setup(), and vt48_Status().

00096 {
00097   int cmode;
00098 
00099   mvme_get_dmode(mvme, &cmode);
00100   mvme_set_dmode(mvme, MVME_DMODE_D32);
00101   mvme_write_value(mvme, base+reg, data);
00102   mvme_set_dmode(mvme, cmode);
00103   return;
00104 }

int vt48_Setup ( MVME_INTERFACE mvme,
DWORD  base,
int  mode 
)

Sets all the necessary paramters for a given configuration. The configuration is provided by the mode argument. Add your own configuration in the case statement. Let me know your setting if you want to include it in the distribution.

Parameters:
*mvme VME structure
base Module base address
mode Configuration mode number
*nentry number of entries requested and returned.
Returns:
MVME_SUCCESS

Definition at line 180 of file vt48.c.

00181 {
00182   int  cmode;
00183 
00184   mvme_get_dmode(mvme, &cmode);
00185   mvme_set_dmode(mvme, MVME_DMODE_D32);
00186 
00187   switch (mode) {
00188   case 0x1:
00189     printf("Default setting after power up (mode:%d)\n", mode);
00190     printf("Same configuration in both AMTs... Ch0-47 enabled\n");
00191     printf("Time relative to trigger, Trigger matching enabled\n");
00192 
00193     vt48_RegWrite(mvme, base, VT48_CMD_REG, 0x10);  // AMT Global Reset
00194 
00195     vt48_RegWrite(mvme, base, VT48_CSR0_REG, 0xf0200020); // enable direct (Trigger/Reset)
00196     vt48_RegWrite(mvme, base, VT48_CSR1_REG, 0x0000);     // mask window
00197     vt48_RegWrite(mvme, base, VT48_CSR2_REG, 0x0080);     // search window (# of 20ns clock)
00198     vt48_RegWrite(mvme, base, VT48_CSR3_REG, 0x0070);     // match window ( same)
00199     vt48_RegWrite(mvme, base, VT48_CSR4_REG, 0x0f80);     // reject offset (same) 
00200     vt48_RegWrite(mvme, base, VT48_CSR5_REG, 0x0000);     // event offset (same)
00201     vt48_RegWrite(mvme, base, VT48_CSR6_REG, 0x0fa0);     // bunch offset (same)
00202     vt48_RegWrite(mvme, base, VT48_CSR7_REG, 0x0000);     // coarse time offset (same)
00203     vt48_RegWrite(mvme, base, VT48_CSR8_REG, 0x0fff);     // counter roll over (same)
00204     vt48_RegWrite(mvme, base, VT48_CSR9_REG, 0xf3000301); // TDCs Id 0,1... (should remain fixed)
00205     vt48_RegWrite(mvme, base, VT48_CSR10_REG, 0x0af1);    // Different mask enable (trig match, relative)
00206     //vt48_RegWrite(mvme, base, VT48_CSR10_REG, 0x0871);  //                       (disable trigger match)
00207     //vt48_RegWrite(mvme, base, VT48_CSR10_REG, 0x0a71);  //                        disable relative)
00208     vt48_RegWrite(mvme, base, VT48_CSR11_REG, 0x0e11);    // More mask enable (overflows ... see man)
00209     vt48_RegWrite(mvme, base, VT48_CSR12_REG, 0x01ff);    // Enable Error report
00210     vt48_RegWrite(mvme, base, VT48_CSR13_REG, 0x0fff);    // Channel 0..11 enable (TDC1 all on, TDC2 - all on)
00211     vt48_RegWrite(mvme, base, VT48_CSR14_REG, 0x0fff);    // Channel 12..23 enable (TDC1 all on, TDC2 - all on)
00212 
00213     break;
00214 
00215   case 0x2:
00216     printf("Default setting after power up (mode:%d)\n", mode);
00217     printf("Same configuration in both AMTs... Ch0-23 (TDC ID=1), Ch24-47 (disable)\n");
00218 
00219     vt48_RegWrite(mvme, base, VT48_CMD_REG, 0x10);  // AMT Global Reset
00220 
00221     vt48_RegWrite(mvme, base, VT48_CSR0_REG, 0xf0200020); // enable direct (Trigger/Reset)
00222     vt48_RegWrite(mvme, base, VT48_CSR1_REG, 0x0000);     // mask window
00223     vt48_RegWrite(mvme, base, VT48_CSR2_REG, 0x0080);     // search window (# of 20ns clock)
00224     vt48_RegWrite(mvme, base, VT48_CSR3_REG, 0x0070);     // match window ( same)
00225     vt48_RegWrite(mvme, base, VT48_CSR4_REG, 0x0f80);     // reject offset (same) 
00226     vt48_RegWrite(mvme, base, VT48_CSR5_REG, 0x0000);     // event offset (same)
00227     vt48_RegWrite(mvme, base, VT48_CSR6_REG, 0x0fa0);     // bunch offset (same)
00228     vt48_RegWrite(mvme, base, VT48_CSR7_REG, 0x0000);     // coarse time offset (same)
00229     vt48_RegWrite(mvme, base, VT48_CSR8_REG, 0x0fff);     // counter roll over (same)
00230     vt48_RegWrite(mvme, base, VT48_CSR9_REG, 0xf3020301); // TDCs id ... (should remain fixed)
00231     vt48_RegWrite(mvme, base, VT48_CSR10_REG, 0x0af1);    // Different mask enable (trig match, relative)
00232     //vt48_RegWrite(mvme, base, VT48_CSR10_REG, 0x0871);  //                       (disable trigger match)
00233     //vt48_RegWrite(mvme, base, VT48_CSR10_REG, 0x0a71);  //                        disable relative)
00234     vt48_RegWrite(mvme, base, VT48_CSR11_REG, 0x0e11);    // More mask enable (overflows ... see man)
00235     vt48_RegWrite(mvme, base, VT48_CSR12_REG, 0x01ff);    // Enable Error report
00236     vt48_RegWrite(mvme, base, VT48_CSR13_REG, 0xf0000fff);// Channel 0..11 enable (TDC1 all on, TDC2 - all off)
00237     vt48_RegWrite(mvme, base, VT48_CSR14_REG, 0xf0000fff);// Channel 12..23 enable (TDC1 all on, TDC2 - all off)
00238 
00239     break;
00240 
00241   case 0x3:
00242     printf("Modified setting (mode:%d)\n", mode);
00243     printf("... nothing for now\n");
00244 
00245     break;
00246   case 0x11:
00247     printf("Modified setting (mode:%d)\n", mode);
00248     printf("... TRIGGER SENT!!\n");
00249     vt48_RegWrite(mvme, base, VT48_CMD_REG, 0xf);
00250     break;
00251   default:
00252     printf("Unknown setup mode\n");
00253     mvme_set_dmode(mvme, cmode);
00254     return -1;
00255   }
00256 
00257   // Configure AMTs
00258   vt48_RegWrite(mvme, base, VT48_CMD_REG, VT48_AMT_CFG_RW); // Write to the AMT 
00259   usleep(200);
00260   vt48_RegWrite(mvme, base, VT48_CMD_REG, VT48_AMT_CFG_RW); // Force update of Read-back Reg (CSR0..14) 
00261   usleep(200);
00262   
00263   // AMT Bunch Reset
00264   vt48_RegWrite(mvme, base, VT48_CMD_REG, 0x12);
00265   usleep(1);
00266   
00267   //  vt48_Status(mvme, base);
00268   mvme_set_dmode(mvme, cmode);
00269   return 0;
00270 }

void vt48_Status ( MVME_INTERFACE mvme,
DWORD  base 
)

Definition at line 273 of file vt48.c.

00274 {
00275   int cmode, i;
00276   DWORD val1, val2;
00277 
00278   mvme_get_dmode(mvme, &cmode);
00279   mvme_set_dmode(mvme, MVME_DMODE_D32);
00280   printf("----- VT48 Status -- Base:0x%x -----\n", base);
00281   val1 = vt48_RegRead(mvme, base, VT48_CSR_RO);
00282   printf("CSR (Occupancy) : 0x%x\n", val1);
00283   vt48_RegWrite(mvme, base, VT48_CMD_REG, VT48_AMT_ID_R);
00284   usleep(100000);
00285   val1 = vt48_RegRead(mvme, base, VT48_ID1_REG_RO);
00286   val2 = vt48_RegRead(mvme, base, VT48_ID2_REG_RO);
00287   printf("AMTs ID         : 0x%x  - 0x%x\n", val1, val2);
00288   vt48_RegWrite(mvme, base, VT48_CMD_REG, VT48_AMT_STATUS_R);
00289   usleep(100000);
00290 
00291   // Read AMT3 Status Reg
00292   for (i=0;i<6;i++) {
00293     val1 = vt48_RegRead(mvme, base, VT48_CSR16_REG+i*4);
00294     printf("AMT3 CSR%2d     : 0x%8.8x\n", 16+i, val1);
00295   }
00296 
00297   // Read Control Registers
00298   for (i=0;i<15;i++) {
00299     val1 = vt48_RegRead(mvme, base, VT48_CSR0_REG+i*4);
00300     printf("AMT3 CTL%2d     : 0x%8.8x\n", i, val1);
00301   }
00302 
00303   // Read Read-back Reg from last configuration
00304   for (i=0;i<15;i++) {
00305     val1 = vt48_RegRead(mvme, base, VT48_CSR0_RB_REG+i*4);
00306     printf("AMT3 CSR-RB%2d  : 0x%8.8x\n", i, val1);
00307   }
00308   mvme_set_dmode(mvme, cmode);
00309 }

void vt48_WindowOffsetSet ( MVME_INTERFACE mvme,
DWORD  base,
float  offset 
)

Definition at line 121 of file vt48.c.

00122 {
00123   int cmode;
00124 
00125   mvme_get_dmode(mvme, &cmode);
00126   mvme_set_dmode(mvme, MVME_DMODE_D32);
00127   printf("WindowOffset() Not implemented yet\n");
00128   mvme_set_dmode(mvme, cmode);
00129   return;
00130 }

void vt48_WindowSet ( MVME_INTERFACE mvme,
DWORD  base,
float  window 
)

Definition at line 108 of file vt48.c.

00109 {
00110   int cmode;
00111 
00112   mvme_get_dmode(mvme, &cmode);
00113   mvme_set_dmode(mvme, MVME_DMODE_D32);
00114   printf("Window() Not implemented yet\n");
00115   mvme_set_dmode(mvme, cmode);
00116   return;
00117 }


Midas DOC Version 3.0.0 ---- PSI Stefan Ritt ----
Contributions: Pierre-Andre Amaudruz - Sergio Ballestrero - Suzannah Daviel - Doxygen - Peter Green - Qing Gu - Greg Hackman - Gertjan Hofman - Paul Knowles - Exaos Lee - Rudi Meier - Glenn Moloney - Dave Morris - John M O'Donnell - Konstantin Olchanski - Renee Poutissou - Tamsen Schurman - Andreas Suter - Jan M.Wouters - Piotr Adam Zolnierczuk