From DaqWiki
Jump to navigation Jump to search

VME-ALPHA-TTC - ALPHA (CERN AD-5) Si vertex detector control module




  • Main FPGA: Altera cyclone 1: EP1C6Q240C6N
  • Trigger FPGA: two of the same (3 FPGA grand total)
  • Serial flash for FPGA configuration: Altera EPCS16
  • 6+6 NIM outputs
  • 2 analog outputs for calibration pulse
  • 2 NIM inputs
  • 256 LVDS inputs into the 2 trigger FPGAs (128 inputs each)

Firmware update procedure

  • obtain and build the TTC test program from the ALPHA SVN repository (testTTC.exe):
  • obtain and build the VME programmer (srunner_vme):
  • read the firmware revision from VME register 0:
    • ./testTTC.exe --ttcx --exit
  • write Cyclone 1 FPGA firmware into the flash memory using the VME programmer:
    • ./srunner_vme_gef.exe -program -64 alphaTTC_0x7f120629.pof 0x410000b4
  • there is no reset-mod for the ALPHA TTC module, you have to cycle the power to reboot it (reboot the Cyclone 1 FPGA into the new firmware) (requires "fpga-reset" mod):