VME-ALPHA-TTC: Difference between revisions

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= VME-ALPHA-TTC - ALPHA (CERN AD-5) Si vertex detector control module =
== VME-ALPHA-TTC - ALPHA (CERN AD-5) Si vertex detector control module ==


== References ==
== References ==


* [http://edev.triumf.ca/projects/edevel00023] VME-NIMIO32 (REA 131) project page on edev.triumf.ca
* https://bitbucket.org/expalpha/ttc_firmware.git
* [http://edev.triumf.ca/documents/8] Rev0 board schematics
* [[File:ALPHA_TTC_20091105.pdf]] board schematics
* [http://edev.triumf.ca/documents/7] Rev1 board schematics
* [[File:ALPHA_TTC.pdf]] firmware schematics
* [http://ladd00.triumf.ca/viewcvs/daqsvn/trunk/VME-NIMIO32] Svn repository for VME-NIMIO32 firmware
* https://bitbucket.org/expalpha/ttc_firmware/src/master/alphaTTC.txt firmware manual
* [http://ladd00.triumf.ca/viewcvs/daqsvn/trunk/VME-NIMIO32/Documentation] Misc documentation
* https://bitbucket.org/expalpha/ttc_firmware/src/master/ALPHA_TTC/ firmware binaries are alphaTTC.pof and alphaTTC_yyyymmdd.pof
* https://bitbucket.org/expalpha/ttc_firmware/src/master/MAX3000A_Addr_decode/VME_Addr_decode.pof firmware binary for the VME address decoder CPLD
* (dead) [https://ladd00.triumf.ca/viewvc/alpha/trunk/online/ttc/source] SVN repository for firmware and documentation
* (dead) [https://ladd00.triumf.ca/viewvc/alpha/trunk/online/ttc/source/ALPHA_TTC_20091105.pdf?view=co] board schematics
* (dead) [https://ladd00.triumf.ca/viewvc/alpha/trunk/online/ttc/source/ALPHA_TTC/ALPHA_TTC.pdf?view=log] firmware schematics
* (dead) [https://ladd00.triumf.ca/viewvc/alpha/trunk/online/ttc/source/alphaTTC.txt?view=markup] firmware manual
* (dead) [https://ladd00.triumf.ca/viewvc/alpha/trunk/online/ttc/source/ALPHA_TTC/alphaTTC.pof?view=log] firmware POF files (!!!DO NOT USE THE FILES NAMED ALPHA_TTC.POF!!!)
* (dead) [https://ladd00.triumf.ca/viewvc/alpha/trunk/online/ttc/source/MAX3000A_Addr_decode/VME_Addr_decode.pof?view=log] POF file for the VME address decoder CPLD


== General characteristics ==
== Photos ==


### ==== Photos ====
== Hardware ==
###
### [[Image:VME-NIMIO32-Rev0-Rev1.jpg|150px|Rev0 and Rev 1 boards]]
 
== Available hardware ==


* Main FPGA: Altera cyclone 1: EP1C6Q240C6N
* Main FPGA: Altera cyclone 1: EP1C6Q240C6N
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== Firmware update procedure ==
== Firmware update procedure ==


* obtain and build the VME programmer (srunner_vme) and IO32 test program (test_VMENIMIO32):
* obtain and build the TTC test program from the ALPHA SVN repository (testTTC.exe):
** mkdir $HOME/online
** cd $HOME/online
** svn checkout https://ladd00.triumf.ca/svn/alpha/trunk/online/vme
** cd vme
** make testTTC.exe
** (Makefile may need to be adjusted to switch between the GEF_VME and the Universe drivers)
 
* obtain and build the VME programmer (srunner_vme):
** mkdir $HOME/packages
** mkdir $HOME/packages
** cd $HOME/packages
** cd $HOME/packages
** svn checkout https://ladd00.triumf.ca/svn/daqsvn/trunk/vme (username svn, password svn)
** svn checkout https://ladd00.triumf.ca/svn/daqsvn/trunk/vme (username svn, password svn)
** cd vme
** cd vme
** make -k srunner_vme.exe srunner_vme_gef.exe test_VMENIMIO32.exe test_VMENIMIO32_gef.exe
** make -k srunner_vme.exe srunner_vme_gef.exe


* read the firmware revision from VME register 0:
* read the firmware revision from VME register 0:
** ./test_VMENIMIO32_gef.exe --addr 0x100000 --read 0
** ./testTTC.exe --ttcx --exit


* write Cyclone 1 FPGA firmware into the flash memory using the VME programmer:
* write Cyclone 1 FPGA firmware into the flash memory using the VME programmer:
** ./srunner_vme_gef.exe -program -64 VME-NIMIO32.pof 0x100020
** ./srunner_vme_gef.exe -program -64 alphaTTC_0x7f120629.pof 0x410000b4
** !!!be careful about using Rev0 pof files for Rev0 boards and Rev1 pof files for Rev1 boards!!!
 
* reboot the Cyclone 1 FPGA into the new firmware (requires "fpga-reset" mod):
** ./test_VMENIMIO32_gef.exe --addr 0x100000 --reboot
 
== Firmware revisions ==
 
Firmware for the main FPGA:
* firmware sources [[http://ladd00.triumf.ca/viewvc/daqsvn/trunk/VME-NIMIO32/VME-NIMIO32]]
* firmware schematics [[http://ladd00.triumf.ca/viewvc/daqsvn/trunk/VME-NIMIO32/VME-NIMIO32/VME-NIMIO32.pdf?view=log]]
* pof files for Rev0 [[http://ladd00.triumf.ca/viewvc/daqsvn/trunk/VME-NIMIO32/VME-NIMIO32/Rev0/VME-NIMIO32.pof?view=log]]


Firmware for the VME address decoder:
* there is no reset-mod for the ALPHA TTC module, you have to cycle the power to reboot it (reboot the Cyclone 1 FPGA into the new firmware) (requires "fpga-reset" mod):
* firmware sources [[http://ladd00.triumf.ca/viewvc/daqsvn/trunk/VME-NIMIO32/MAX3000A_Addr_decode]]
* board Rev0 [[http://ladd00.triumf.ca/viewvc/daqsvn/trunk/VME-NIMIO32/MAX3000A_Addr_decode/VME_Addr_decode.pof?revision=37&view=co]]

Latest revision as of 20:06, 3 June 2022

VME-ALPHA-TTC - ALPHA (CERN AD-5) Si vertex detector control module

References

Photos

Hardware

  • Main FPGA: Altera cyclone 1: EP1C6Q240C6N
  • Trigger FPGA: two of the same (3 FPGA grand total)
  • Serial flash for FPGA configuration: Altera EPCS16
  • 6+6 NIM outputs
  • 2 analog outputs for calibration pulse
  • 2 NIM inputs
  • 256 LVDS inputs into the 2 trigger FPGAs (128 inputs each)

Firmware update procedure

  • obtain and build the TTC test program from the ALPHA SVN repository (testTTC.exe):
  • obtain and build the VME programmer (srunner_vme):
  • read the firmware revision from VME register 0:
    • ./testTTC.exe --ttcx --exit
  • write Cyclone 1 FPGA firmware into the flash memory using the VME programmer:
    • ./srunner_vme_gef.exe -program -64 alphaTTC_0x7f120629.pof 0x410000b4
  • there is no reset-mod for the ALPHA TTC module, you have to cycle the power to reboot it (reboot the Cyclone 1 FPGA into the new firmware) (requires "fpga-reset" mod):