VME-PPG32

VME-PPG32 - pulse pattern generator VME FPGA board

References

• [1] VME-PPG32 (REA 198) project page on edev.triumf.ca
• [2] Rev0 board schematics
• [3] Svn repository for initial test firmware
• [4] Current PPG firmware Source/binary

General characteristics

Available hardware

• Altera cyclone 3 FPGA: EP3C40Q240C8
• Serial flash for FPGA configuration: Altera EPCS16
• VME interface: VME-D[31..0] bidirectional, VME-A[23..0] input only, DTACK output, no BERR, no RETRY/RESP. VME-A[31..20] input only connected only to address decoder FPGA (Altera MAX-something CPLD). This permits all single-word transfer modes, 32-bit DMA (BLT32) and 2eVME DMA (only drives D-lines, but still faster than BLT32). 64-bit DMA (MBLT64) and 2eSST are impossible.
• 32 NIM outputs
• 4 NIM inputs
• 32 "NIM output" LEDs
• 4 "NIM input" LEDs
• 1 "VME access" LED
• 2 output serial DAC: AD5439YRUZ

VME interface

VME A32/D32 access only. Rotary switches SW1, SW2 and SW3 set the upper 12 bits of the address. VME registers are listed in the table below.

Registers

Number	Address	Name	Access	Description
0	0x00000	Test	RW	Test Register
1	0x00004	CSR	RW	Control/Status Register
2	0x00008	Addr	RW	Program Address Register
3	0x0000C	Inst_Lo	RW	Instruction Register Part 1/4
4	0x00010	Inst_Med	RW	Instruction Register Part 2/4
5	0x00014	Inst_Hi	RW	Instruction Register Part 3/4
6	0x00018	Inst_Top	RW	Instruction Register Part 4/4
7	0x0001C	Version	R	Firmware Version Register
8	0x00020	Flash	RW	Serial Flash Control Register
9	0x00024	Serial	R	Serial Number Register
10	0x00028	Hardware	R	hardware Identification Register