User contributions for Cpearson
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8 July 2018
- 03:1603:16, 8 July 2018 diff hist +265 VT4 info No edit summary
31 May 2018
- 01:0501:05, 31 May 2018 diff hist +118 m VT4 info No edit summary
- 01:0301:03, 31 May 2018 diff hist +2,062 N VT4 info New page: == VME-VT4 - 4-channel timestamp module using the VME-IO32 board == === VME interface === VME A32/D32 access only. Rotary switches SW1, SW2 and SW3 set the upper 12 bits of the address. ...
22 February 2013
21 February 2013
- 00:0100:01, 21 February 2013 diff hist +159 VME-PPG32 →Clock Control (0x00030)
20 February 2013
- 23:5923:59, 20 February 2013 diff hist +188 VME-PPG32 →Clock Control (0x00030)
- 23:5623:56, 20 February 2013 diff hist +152 VME-PPG32 →Clock Control (0x00030)
- 23:4723:47, 20 February 2013 diff hist +43 m VME-PPG32 →Clock Control (0x00030)
- 23:4623:46, 20 February 2013 diff hist +382 VME-PPG32 →Clock Control (0x00030)
- 23:3423:34, 20 February 2013 diff hist +112 VME-PPG32 →Clock Control (0x00030)
- 23:3223:32, 20 February 2013 diff hist +675 VME-PPG32 →Clock Control (0x00030)
- 23:2223:22, 20 February 2013 diff hist +298 VME-PPG32 →Clock Control (0x00030)
- 23:0623:06, 20 February 2013 diff hist +563 VME-PPG32 →Clock Control (0x00030)
- 22:4822:48, 20 February 2013 diff hist +527 VME-PPG32 →Registers
- 22:1722:17, 20 February 2013 diff hist +105 m VME-PPG32 →Registers
3 March 2012
- 00:0600:06, 3 March 2012 diff hist +279 VME-PPG32 →CSR Register (0x00004)
2 March 2012
- 23:5223:52, 2 March 2012 diff hist +280 VME-PPG32 →PPG characteristics
- 23:4623:46, 2 March 2012 diff hist +1,324 VME-PPG32 →Test Software
- 23:3923:39, 2 March 2012 diff hist +888 VME-PPG32 →CSR Register (0x00004)
- 22:4922:49, 2 March 2012 diff hist +8 VME-PPG32 →Front Panel
6 October 2011
25 January 2011
- 23:5023:50, 25 January 2011 diff hist +34 VME-PPG32 →NIM Inputs
- 23:4923:49, 25 January 2011 diff hist +475 VME-PPG32 →VME-PPG32 - pulse pattern generator VME FPGA board
20 January 2011
- 01:1501:15, 20 January 2011 diff hist 0 VME-PPG32 →Registers
16 January 2011
- 19:3119:31, 16 January 2011 diff hist +3 VME-PPG32 →c-shell script to run 2 nested loops
- 19:3119:31, 16 January 2011 diff hist +37 VME-PPG32 →c-shell script to run 2 nested loops
9 November 2010
- 23:4123:41, 9 November 2010 diff hist +127 VME-PPG32 →VME interface
- 23:3423:34, 9 November 2010 diff hist +62 VME-PPG32 →Registers
- 23:3323:33, 9 November 2010 diff hist +52 VME-PPG32 →PPG characteristics
- 06:4206:42, 9 November 2010 diff hist +3 VME-PPG32 →c-shell script to run 2 nested loops
- 06:4206:42, 9 November 2010 diff hist +1,241 VME-PPG32 →VME-PPG32 - pulse pattern generator VME FPGA board
- 06:3606:36, 9 November 2010 diff hist +76 VME-PPG32 →Address Register (0x00008)
- 06:3406:34, 9 November 2010 diff hist +30 VME-PPG32 →VME-PPG32 - pulse pattern generator VME FPGA board
- 06:3306:33, 9 November 2010 diff hist +335 VME-PPG32 →General characteristics
- 06:2806:28, 9 November 2010 diff hist +24 VME-PPG32 →Instruction Registers (0x0000C - 0x00018)
- 06:2506:25, 9 November 2010 diff hist +3,045 VME-PPG32 →Registers
- 05:4905:49, 9 November 2010 diff hist −1,907 VME-PPG32 →VME-PPG32 - pulse pattern generator VME FPGA board
- 05:3505:35, 9 November 2010 diff hist +82 VME-PPG32 →References
15 October 2010
- 23:2023:20, 15 October 2010 diff hist +241 VF48 →VME Mapping
- 23:2023:20, 15 October 2010 diff hist +241 VF48 →VME Mapping
17 September 2010
- 00:0500:05, 17 September 2010 diff hist +1,965 VF48 →Aux Output
- 00:0500:05, 17 September 2010 diff hist +1,965 VF48 →Aux Output
16 September 2010
- 21:2321:23, 16 September 2010 diff hist +7 VF48 →Aux Output
- 21:2321:23, 16 September 2010 diff hist +7 VF48 →Aux Output
- 21:2121:21, 16 September 2010 diff hist +1,507 VF48 →Triggers & Events
- 21:2121:21, 16 September 2010 diff hist +1,507 VF48 →Triggers & Events