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Entry  13 Feb 2020, Marius Koeppel, Forum, Writting Midas Events via FPGAs 
    Reply  13 Feb 2020, Stefan Ritt, Forum, Writting Midas Events via FPGAs 
       Reply  14 Feb 2020, Konrad Briggl, Forum, Writting Midas Events via FPGAs 
          Reply  14 Feb 2020, Stefan Ritt, Forum, Writting Midas Events via FPGAs 
             Reply  20 Feb 2020, Konstantin Olchanski, Forum, Writting Midas Events via FPGAs 
                Reply  20 Feb 2020, Marius Koeppel, Forum, Writting Midas Events via FPGAs 
                   Reply  20 Feb 2020, Stefan Ritt, Forum, Writting Midas Events via FPGAs 
                      Reply  21 Feb 2020, Konstantin Olchanski, Forum, Writting Midas Events via FPGAs 
                         Reply  21 Feb 2020, Stefan Ritt, Forum, Writting Midas Events via FPGAs 
                   Reply  21 Feb 2020, Konstantin Olchanski, Forum, Writting Midas Events via FPGAs 
Message ID: 1842     Entry time: 20 Feb 2020     In reply to: 1841     Reply to this: 1843
Author: Stefan Ritt 
Topic: Forum 
Subject: Writting Midas Events via FPGAs 
Actually the cause of all of the is a real bug in the midas functions. We want each bank 8-byte aligned, so there is code in bk_close like:

midas.cxx:14788:
     ((BANK_HEADER *) event)->data_size += sizeof(BANK32) + ALIGN8(pbk32->data_size);

While the old sizeof(BANK)=8, the extended sizeof(BANK32)=12, so not 8-byte aligned. This code should rather be:

     ((BANK_HEADER *) event)->data_size += ALIGN8(sizeof(BANK32) +pbk32->data_size);

But if we change that, it would break every midas data file on this planet!

The only chance I see is to use the "flags" in the BANK_HEADER to distinguish a current bank from a "correct" bank. 
So we could introduce a flag BANK_FORMAT_ALIGNED which distinguishes between the two pieces of code above. 
Then bk_iterate32 would look at that flag and do the right thing.

Any thoughts?

Best,
Stefan
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