/home/daqweb/fgddaq/c8051/cmb.h File Reference


Data Structures

struct  EEPAGE
struct  user_data_type

Defines

#define VREF   2.455f
#define ADT7486A_address   0x48
#define SST_LINE1   1
#define SST_TIME   (unsigned long) 1
#define TEMP_TIME   (unsigned long) 2
#define ON   1
#define DONE   1
#define SET   1
#define OFF   0
#define FAILED   0
#define CLEAR   0
#define IGAIN1   0
#define IGAIN2   1
#define IGAIN4   2
#define IGAIN8   3
#define IGAIN16   4
#define SERIALN_LENGTH   4
#define SERIALN_ADD   (PageAddr[3])
#define EEP_CTRL_KEY   0x3C000000
#define EEP_CTRL_READ   0x00110000
#define EEP_CTRL_WRITE   0x00220000
#define EEP_CTRL_INVAL_REQ   0xff000000
#define EEP_CTRL_INVAL_KEY   0x00ff0000
#define EEP_CTRL_OFF_RANGE   0x0000ff00
#define PAGE_SIZE   sizeof(eepage)
#define EEP_RW_IDX   0x02
#define IDXEER   1
#define IDXCTL   2
#define IDXEEP_CTL   27
#define UFTEMPERATURE_MASK   (unsigned int) 0x0300
#define BTEMPERATURE_MASK   (unsigned int) 0x0C00
#define VOLTAGE_MASK   (unsigned int) 0x00FE
#define CURRENT_MASK   (unsigned int) 0x0001

Functions

void user_init (unsigned char init)
void user_loop (void)
void user_write (unsigned char index) reentrant
unsigned char user_read (unsigned char index)
unsigned char user_func (unsigned char *data_in, unsigned char *data_out)
float read_voltage (unsigned char channel, unsigned int *rvalue, unsigned char gain)

Variables

unsigned int xdata PageAddr [] = {0x000, 0x200, 0x400, 0x600}
EEPAGE xdata eepage
EEPAGE xdata eepage2
unsigned char bdata rCTL
sbit CPup = rCTL ^ 0
sbit CXclk = rCTL ^ 1
sbit Ccfg = rCTL ^ 2
sbit Cdeb1 = rCTL ^ 3
sbit CeeS = rCTL ^ 4
sbit CeeR = rCTL ^ 5
sbit CeeClr = rCTL ^ 6
sbit CmSd = rCTL ^ 7
unsigned char bdata rCSR
sbit SPup = rCSR ^ 0
sbit SXclk = rCSR ^ 1
sbit SLinkOn = rCSR ^ 2
sbit Swdog = rCSR ^ 3
sbit SeeS = rCSR ^ 4
sbit SeeR = rCSR ^ 5
sbit SsS = rCSR ^ 6
sbit SmSd = rCSR ^ 7
unsigned int bdata rESR
sbit DI4mon = rESR ^ 8
sbit DV4mon = rESR ^ 9
sbit AV33mon = rESR ^ 10
sbit AV25mon = rESR ^ 11
sbit DV15mon = rESR ^ 12
sbit DV18mon = rESR ^ 13
sbit DV25mon = rESR ^ 14
sbit DV33mon = rESR ^ 15
sbit uCT = rESR ^ 0
sbit FPGAssTT = rESR ^ 1
sbit Vreg1ssTT = rESR ^ 2
sbit Vreg2ssTT = rESR ^ 3
sbit RdssT = rESR ^ 4
sbit EEPROM = rESR ^ 5
sbit AsumLock = rESR ^ 6
sbit V4_OC = rESR ^ 7
float code coeff [8] = {1.901, 2.000 , 1.426, 1.426, 1.0, 1.0, 1.426, 1.426}
float code offset [8] = {0.000, 0.0, 0.0, 0.0 , 0.0, 0.0, 0.0 , 0.0}
user_data_type xdata user_data

Define Documentation

#define ADT7486A_address   0x48

#define BTEMPERATURE_MASK   (unsigned int) 0x0C00

#define CLEAR   0

#define CURRENT_MASK   (unsigned int) 0x0001

#define DONE   1

#define EEP_CTRL_INVAL_KEY   0x00ff0000

#define EEP_CTRL_INVAL_REQ   0xff000000

#define EEP_CTRL_KEY   0x3C000000

#define EEP_CTRL_OFF_RANGE   0x0000ff00

#define EEP_CTRL_READ   0x00110000

#define EEP_CTRL_WRITE   0x00220000

#define EEP_RW_IDX   0x02

#define FAILED   0

#define IDXCTL   2

#define IDXEEP_CTL   27

#define IDXEER   1

#define IGAIN1   0

#define IGAIN16   4

#define IGAIN2   1

#define IGAIN4   2

#define IGAIN8   3

#define OFF   0

#define ON   1

#define PAGE_SIZE   sizeof(eepage)

#define SERIALN_ADD   (PageAddr[3])

#define SERIALN_LENGTH   4

#define SET   1

#define SST_LINE1   1

#define SST_TIME   (unsigned long) 1

#define TEMP_TIME   (unsigned long) 2

#define UFTEMPERATURE_MASK   (unsigned int) 0x0300

#define VOLTAGE_MASK   (unsigned int) 0x00FE

#define VREF   2.455f


Function Documentation

float read_voltage ( unsigned char  channel,
unsigned int *  rvalue,
unsigned char  gain 
)

00237 {
00238   unsigned int  xdata i;
00239   float         xdata voltage;
00240   unsigned int  xdata rawbin;
00241   unsigned long xdata rawsum = 0;
00242 
00243   // Averaging on 10 measurements for now.
00244   for (i=0 ; i<10 ; i++) {
00245     rawbin = adc_read(channel, gain);
00246     rawsum += rawbin;
00247     yield();
00248   }
00249 
00250   /* convert to V */
00251   *rvalue =  rawsum / 10;
00252   voltage = (float)  *rvalue;                  // averaging
00253   voltage = (float)  voltage / 1024.0 * VREF;  // conversion
00254   if ( channel != TCHANNEL)
00255     voltage = voltage * coeff[channel] + offset[channel];
00256 
00257   return voltage;
00258 }

unsigned char user_func ( unsigned char *  data_in,
unsigned char *  data_out 
)

00319 {
00320    /* echo input data */
00321    data_out[0] = data_in[0];
00322    data_out[1] = data_in[1];
00323    return 2;
00324 }

void user_init ( unsigned char  init  ) 

00183 {
00184   char xdata i;
00185   /* Format the SVN and store this code SVN revision into the system */
00186   for (i = 0; i < 4; i++) {
00187     if (svn_rev_code[6 + i] < 48) {
00188       svn_rev_code[6 + i] = '0';
00189     }
00190   }
00191   sys_info.svn_revision = (svn_rev_code[6] - '0') * 1000 +
00192     (svn_rev_code[7] - '0') * 100 +
00193     (svn_rev_code[8] - '0') * 10 +
00194     (svn_rev_code[9] - '0');
00195 
00196 //      P0MDIN = 0xFF;                                          // default 0xFF all digital pins
00197 //      P1MDIN = 0xFF;
00198 //      P2MDIN = 0xFF;
00199 
00200   P0MDOUT = 0x18;                                       // Default OD 485TX, TXD
00201   P1MDOUT = 0x00;                                       // OD
00202   P2MDOUT = 0xFF;                                       // OD
00203 
00204   P0 = 0x03;    // default 0xFF
00205   P1 = 0xFF;
00206   P2 = 0xFF;
00207 
00208   /* set initial state of lines */
00209   GPIB_DATA = 0xFF;
00210   GPIB_EOI = 1;
00211   GPIB_DAV = 1;
00212   GPIB_NRFD = 1;
00213   GPIB_NDAC = 1;
00214   GPIB_IFC = 1;
00215   GPIB_SRQ = 1;
00216   GPIB_ATN = 1;
00217   GPIB_REN = 1;
00218 
00219   BUF_CLE = 0;                  // Enable buffers
00220   BUF_DATAE = 0;
00221 
00222   /* initialize GPIB */
00223   GPIB_IFC = 0;
00224   delay_ms (1);
00225   GPIB_IFC = 1;
00226 
00227   GPIB_ATN = 0;
00228   send_byte (0x14);             // DCL
00229   GPIB_ATN = 1;
00230   
00231   user_data.gpib_adr = GPIB_ADDR_0;
00232   
00233   sprintf (str, "OE2");                         // prohibit overvoltage setting
00234   send (user_data.gpib_adr, str);
00235   sprintf (str, "OC0");                         // hv supply will *not* shutdown if current overload
00236   send (user_data.gpib_adr, str);
00237   sprintf (str, "SE0");                         // enables SRQ in response to overvoltage detection
00238   send (user_data.gpib_adr, str);
00239   sprintf (str, "SC0");                         // enables SRQ in response to overcurrent detection
00240   send (user_data.gpib_adr, str);
00241 
00242   user_data.status = 0;
00243   if (init) {
00244    user_data.ramp_up = 10;
00245    user_data.ramp_down = 10;
00246    user_data.u_limit = MAX_VOLTAGE;
00247    user_data.i_limit = MAX_CURRENT;
00248   }
00249   sprintf (user_data.warning, "current OK");
00250 
00251   set_voltage_limit(user_data.u_limit);
00252   set_current_limit(user_data.i_limit);
00253 
00254   read_hvi();                                // check to see if hv is already on
00255 
00256   if ( user_data.u_meas < 10 )               // bertan hv must be off
00257   {
00258       user_data.u_demand = 0;
00259       u_actual = 0;
00260       set_hv(0);
00261   }
00262   else                                       // bertan hv must already be on
00263   {
00264       user_data.u_demand = user_data.u_meas; // restore to status quo
00265       u_actual = user_data.u_meas;
00266   }
00267 
00268 #ifdef RTC_410
00269 // Init RTC on 410
00270    SmaRTCInit();
00271 #endif
00272 }

void user_loop ( void   ) 

00683 {
00684   /* set voltage limit if changed */
00685   if (chn_bits & HV_LIMIT_CHANGED) {
00686     set_voltage_limit(user_data.u_limit);
00687     chn_bits &= ~HV_LIMIT_CHANGED;
00688   }
00689 
00690   /* set current limit if changed */
00691   if (chn_bits & CUR_LIMIT_CHANGED) {
00692     set_current_limit(user_data.i_limit);
00693     chn_bits &= ~CUR_LIMIT_CHANGED;
00694   }
00695 
00696   // Read Voltage and Current
00697   read_hvi();
00698 
00699   // Yield to other activities (MSCB)
00700 //  yield();
00701 
00702   // Do ramping if necessary
00703   ramp_hv();
00704 
00705 #ifdef RTC_410
00706   // RTC stuff
00707   ltime = SmaRTCRead();
00708   user_data.mytime = ltime;
00709   ascTime(mydate, ltime);
00710   sprintf(user_data.date, "%s", mydate);
00711 #endif
00712 
00713   // Slow it down
00714   delay_ms (MINDEL);
00715 
00716   // Loop timing
00717   led_blink(0, 1, 50);
00718 }

unsigned char user_read ( unsigned char  index  ) 

00311 {
00312    if (index);
00313    return 0;
00314 }

void user_write ( unsigned char  index  ) 

00387 {
00388   rCSR = user_data.status;
00389   if (index == IDXCTL) {
00390     rCTL = user_data.control;
00391   } // IDXCTL
00392 
00393   //
00394   //-- EE Page function
00395   if (index == IDXEEP_CTL) EEP_CTR_Flag = 1;
00396 }


Variable Documentation

sbit AsumLock = rESR ^ 6

sbit AV25mon = rESR ^ 11

sbit AV33mon = rESR ^ 10

sbit Ccfg = rCTL ^ 2

sbit Cdeb1 = rCTL ^ 3

sbit CeeClr = rCTL ^ 6

sbit CeeR = rCTL ^ 5

sbit CeeS = rCTL ^ 4

sbit CmSd = rCTL ^ 7

float code coeff[8] = {1.901, 2.000 , 1.426, 1.426, 1.0, 1.0, 1.426, 1.426}

sbit CPup = rCTL ^ 0

sbit CXclk = rCTL ^ 1

sbit DI4mon = rESR ^ 8

sbit DV15mon = rESR ^ 12

sbit DV18mon = rESR ^ 13

sbit DV25mon = rESR ^ 14

sbit DV33mon = rESR ^ 15

sbit DV4mon = rESR ^ 9

struct EEPAGE xdata eepage

Initial value:

 {

 0x00000000

 , 110

 , 123

 , 0.0, 3.0, 3.0, 2.0, 1.2, 1.5, 2.0, 3.0

 , 4.0, 4.5, 3.7, 2.7, 1.7, 2.0, 2.7, 3.7

 , 10., 50.

 , 10. ,50.

 , 0.0, 0.0, 0.0, 0.0
}

struct EEPAGE xdata eepage2

sbit EEPROM = rESR ^ 5

sbit FPGAssTT = rESR ^ 1

float code offset[8] = {0.000, 0.0, 0.0, 0.0 , 0.0, 0.0, 0.0 , 0.0}

unsigned int xdata PageAddr[] = {0x000, 0x200, 0x400, 0x600}

unsigned char bdata rCSR

unsigned char bdata rCTL

sbit RdssT = rESR ^ 4

unsigned int bdata rESR

sbit SeeR = rCSR ^ 5

sbit SeeS = rCSR ^ 4

sbit SLinkOn = rCSR ^ 2

sbit SmSd = rCSR ^ 7

sbit SPup = rCSR ^ 0

sbit SsS = rCSR ^ 6

sbit Swdog = rCSR ^ 3

sbit SXclk = rCSR ^ 1

sbit uCT = rESR ^ 0

struct user_data_type xdata user_data

sbit V4_OC = rESR ^ 7

sbit Vreg1ssTT = rESR ^ 2

sbit Vreg2ssTT = rESR ^ 3


Generated on 10 Jun 2013 for FGDC8051 by  doxygen 1.4.7