/home/daqweb/fgddaq/c8051/Protocols/SMBus310_handler.h File Reference

Defines
#define	SMB_WRITE   0x00
#define	SMB_READ   0x01
#define	SMB_ENABLE_ACKPOLL   0x01
#define	SMB_DISABLE_ACKPOLL   0x00
#define	SMB_MAX_BUFF_SIZE   8
#define	SMB_MTSTA   0xE0
#define	SMB_MTDB   0xC0
#define	SMB_MRDB   0x80
#define	SMB_STATE_START   0xE0
#define	SMB_STATE_MT_ACK   0xC2
#define	SMB_STATE_MT_NACK   0xC0
#define	SMB_STATE_MR_DATA_ACK   0x88
#define	SMB_STATE_SR_ADDR_ACK   0x2C
#define	SMB_STATE_ST_DATA_NACK   0x40
#define	MASTER_LOST_ARBIT   0x2C
#define	REP_START_LOST_ARBIT   0x24
#define	STOP_LOST_ARBIT   0x14
#define	MT_LOST_ARBIT   0x0C
Functions
void	SMBus_Init (void)
void	SMBus_EnableACKPoll (void)
void	SMBus_SetSlaveAddr (unsigned char slaveAddr)
void	SMBus_SetTXBuffer (unsigned char *pData, unsigned char dataLen)
void	SMBus_SetRXBuffer (unsigned char *pData, unsigned char dataLen)
void	SMBus_Wait (void)
void	SMBus_Start (void)
void	SMBus_Clear (void)

---

Define Documentation

#define MASTER_LOST_ARBIT   0x2C

#define MT_LOST_ARBIT   0x0C

#define REP_START_LOST_ARBIT   0x24

#define SMB_DISABLE_ACKPOLL   0x00

#define SMB_ENABLE_ACKPOLL   0x01

#define SMB_MAX_BUFF_SIZE   8

#define SMB_MRDB   0x80

#define SMB_MTDB   0xC0

#define SMB_MTSTA   0xE0

#define SMB_READ   0x01

#define SMB_STATE_MR_DATA_ACK   0x88

#define SMB_STATE_MT_ACK   0xC2

#define SMB_STATE_MT_NACK   0xC0

#define SMB_STATE_SR_ADDR_ACK   0x2C

#define SMB_STATE_ST_DATA_NACK   0x40

#define SMB_STATE_START   0xE0

#define SMB_WRITE   0x00

#define STOP_LOST_ARBIT   0x14

---

Function Documentation

void SMBus_Clear

(

void

)

                       {
  pSMB_DATA_IN = 0;
  SMB_DATA_IN_LEN = 0;
  SMB_DATA_OUT_LEN = 0;
  SMB_BUSY = 0;
  SMB_ACKPOLL = SMB_DISABLE_ACKPOLL;
}

void SMBus_EnableACKPoll

(

void

)

                               {
  SMB_ACKPOLL = SMB_ENABLE_ACKPOLL;
}

void SMBus_Init

(

void

)

Initializing the SMBus

                      {
  static char init = 0;

  if(!init) {
    init = 1;

    // Configuring the Timer3 Registers
    TMR3CN = 0x00;      // Turn Clock off and SYSCLK / 12

    TMR3RLL = 0x00; /* TIMER 3 RELOAD LOW BYTE */
    TMR3RLH = 0x00; /* TIMER 3 RELOAD HIGH BYTE */
    TMR3L = 0x00;   //Timer3 Low Bytes
    TMR3H = 0x00;   //Timer3 High Bytes
    TMR3CN = 0x04;  // Enable Timer3

    SMB0CF = 0x5D;   // SMbus Setup Hold Extension/Timeout Detection/Free Timeout Detection Enable
    // Timer1 Overflow is set as the clock source
    SMB0CF |= 0x80;  // Enable SMBus after all setting done.


    EIE1 |= 0x81;          // Enable SMBus interrupts/Enable Timer3 interrupts
    EA = 1;                      // Enable Global interrupts 
    
    SMBus_Clear();    
  }
}

void SMBus_SetRXBuffer	(	unsigned char *	pData,
		unsigned char	dataLen
	)

                                                                    {
  pSMB_DATA_IN = pData; 
  SMB_DATA_IN_LEN = dataLen;
}

void SMBus_SetSlaveAddr

(

unsigned char

slaveAddr

)

                                                 {
  SMB_TARGET = slaveAddr;
}

void SMBus_SetTXBuffer	(	unsigned char *	pData,
		unsigned char	dataLen
	)

                                                                    {
  unsigned char i;

  for(i = 0; (i < dataLen) && (i < SMB_MAX_BUFF_SIZE); ++i) {
    SMB_DATA_OUT[i] = pData[i];
  }
  
  SMB_DATA_OUT_LEN = i;  
}

void SMBus_Start

(

void

)

                       {
  if(SMB_DATA_OUT_LEN > 0) {
    SMB_RW = SMB_WRITE;
  } else if(SMB_DATA_IN_LEN > 0) {
    SMB_RW = SMB_READ;
  } else {
    return;
  }
  
  SMB_BUSY = 1;
  STA = 1;

  SMBus_Wait();
  SMBus_Clear();
}

void SMBus_Wait

(

void

)

                      {
  while(SMB_BUSY);
}

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