Collector Master Board (CMB)
1
Purpose
Reads the FEBs card and tranmsmit the data to the DCCs.
Description
The Crate Master Board (CMB) handles the operation of 4 FEB64 boards. It provides all the necessary signals for the operation of the SCAs, the collection of the data and the transmission to the DCCs (optical link). It also receive the time marker signals (RJ45), the triggers and handles the ASUM data as FGD trigger source.
Card Operation
- By default at power up the main elements of the card are kept unpowered.
- The CMB can be controlled for the following operation:
- Manual Power Up sequence, ie: turn ON all the DC Voltage (Def:OFF)
- Manual Shutdown sequence, ie: turn OFF all the DC Voltage.
- To power up the card:
- CTL register(idx:2) Set bit ^ 0 [0x1]
- CSR register(idx:3) will show bit ^ 0 = 1/0 (1=on, 0=off)
- To power down the card:
- CTL register(idx:2) Set bit ^ 7 [0x80] Manual Shutdown
- CSR register(idx:3) will show bit ^ 0 = 1/0 (1=on, 0=off)
- To Toggle the External Clock source:
- CTL register(idx:2) Set bit ^1 [0x2] Toggle Extenal Clock source
- CSR register(idx:3) will show bit ^ 1 = 1/0 (1=External, 0=Internal)
- To force a reconfigure cycle to the FPGA:
- CTL register(idx:2) Set bit ^2 [0x4] Trigger a reconfigure cycle
MSCB Registers
node44(0x2C)> r a
0: SerialN 32bit U 76400029 (0x048DC59D) byte
1: Error 16bit U 0 (0x0000) byte
I4d Current fault 0x0001
V4d Voltage fault 0x0002
V3.3a Voltage fault 0x0004
V2.5a Voltage fault 0x0008
V1.5d Voltage fault 0x0010
V1.8d Voltage fault 0x0020
V2.5d Voltage fault 0x0040
V3.3d Voltage fault 0x0080
uC Temperature fault 0x0100
FPGA Temperature fault 0x0200
VReg1 Temperature fault 0x0400
VReg2 Temperature fault 0x0800
read SST error 0x1000
EEPROM R/W error 0x2000
ASUM Lock 0x4000
Main 4V over Current 0x8000
2: Control 8bit U 0 (0x00/00000000) byte
Turn ON Card 0x01
Toggle External Clock 0x02
Issue Configure pulse 0x04
Issue Debug command 0x08
Save Setting to EEPAGEx 0x10
Restore EEPAGEx to memory 0x20
Clear EEPAGEx 0x40
Manual Card shutdown 0x80
3: Status 8bit U 5 (0x05/00000101) byte
Card ON 0x01
External Clock (1:Ext/0=Int) 0x02
Optical link (1=Link ON/0=OFF) 0x04
Watchdog state 0x08
EEPAGEx save operation complete 0x10
EEPAGEx restore operation complete 0x20
System Shutdown 0x40
Manual card shutdown 0x80
4: EEPage 8bit U 5 (0x05/00000101) byte
EEPAGE number [0..3]
5: Spare 8bit U 5 (0x05/00000101) byte
6: pDI4Mon 32bit F 1.40829 ampere
7: pDV4Mon 32bit F 3.93184 volt
8: pAV33Mon 32bit F 3.34015 volt
9: pAV25Mon 32bit F 2.5128 volt
10: pDV15Mon 32bit F 1.5128 volt
11: pDV18Mon 32bit F 1.82207 volt
12: pDV25Mon 32bit F 2.50938 volt
13: pDV33Mon 32bit F 3.30254 volt
14: uCTemp 32bit F 33 deg. celsius
15: FpgaTemp 32bit F 27.6275 deg. celsius
16: Vrg1Temp 32bit F 28.5181 deg. celsius
17: Vrg2Temp 32bit F 28.4087 deg. celsius
18: rDI4Mon 16bit U 309 (0x0135) byte
19: rDV4Mon 16bit U 820 (0x0334) byte
20: rAV33Mon 16bit U 977 (0x03D1) byte
21: rA25VMon 16bit U 735 (0x02DF) byte
22: rDV15Mon 16bit U 631 (0x0277) byte
23: rDV18Mon 16bit U 760 (0x02F8) byte
24: rDV25Mon 16bit U 734 (0x02DE) byte
25: rDV33Mon 16bit U 966 (0x03C6) byte
26: eepValue 32bit F -3.82632e+06 byte
27: eeCtrSet 32bit U 3804124107 (0xE2BE53CB) byte
Location
This card is located in each "crate" mounted on the surrounding structure of each FGD (24 crates per FGD). Each crate contains 1 CMB card.
