Defines | |
| #define | RTC_SHORT 0x10 |
| #define | RTC_VREGEN 0x20 |
| #define | RTC_AUTORD 0x40 |
| #define | RTC_BUSY 0x80 |
| #define | RTC_WAIT() while ( RTC0ADR & RTC_BUSY ) |
| #define | RTC_WRITE(addr, dat) { RTC0ADR = (addr) | RTC_SHORT; RTC0DAT = dat; } |
| #define | RTC_READ(addr) { RTC0ADR = (addr) | RTC_SHORT | RTC_BUSY; } |
| #define | RTC_WAIT_WRITE(addr, dat) { RTC_WAIT(); RTC_WRITE( addr, dat ); } |
| #define | RTC_WAIT_READ(addr, dat) { RTC_WAIT(); RTC_READ( addr ); RTC_WAIT(); dat = RTC0DAT; } |
| #define | RTC_TimeSize 6 |
Typedefs | |
| typedef unsigned char | uchar |
Enumerations | |
| enum | { CAPTURE0, CAPTURE1, CAPTURE2, CAPTURE3, CAPTURE4, CAPTURE5, RTC0CN, RTC0XCN, ALARM0, ALARM1, ALARM2, ALARM3, ALARM4, ALARM5, RAMADDR, RAMDATA } |
Functions | |
| void | SmaRTCInit (void) |
| void | rtc_WriteTimeReg (uchar addr) |
| void | rtc_ReadTimeReg (uchar addr) |
| void | SmaRTCSetTime (unsigned long int mytime) |
| unsigned long int | SmaRTCRead (void) |
| #define RTC_AUTORD 0x40 |
| #define RTC_BUSY 0x80 |
| #define RTC_READ | ( | addr | ) | { RTC0ADR = (addr) | RTC_SHORT | RTC_BUSY; } |
| #define RTC_SHORT 0x10 |
| #define RTC_TimeSize 6 |
| #define RTC_VREGEN 0x20 |
| #define RTC_WAIT | ( | ) | while ( RTC0ADR & RTC_BUSY ) |
| #define RTC_WAIT_READ | ( | addr, | |||
| dat | ) | { RTC_WAIT(); RTC_READ( addr ); RTC_WAIT(); dat = RTC0DAT; } |
| #define RTC_WAIT_WRITE | ( | addr, | |||
| dat | ) | { RTC_WAIT(); RTC_WRITE( addr, dat ); } |
| #define RTC_WRITE | ( | addr, | |||
| dat | ) | { RTC0ADR = (addr) | RTC_SHORT; RTC0DAT = dat; } |
| typedef unsigned char uchar |
| anonymous enum |
| CAPTURE0 | |
| CAPTURE1 | |
| CAPTURE2 | |
| CAPTURE3 | |
| CAPTURE4 | |
| CAPTURE5 | |
| RTC0CN | |
| RTC0XCN | |
| ALARM0 | |
| ALARM1 | |
| ALARM2 | |
| ALARM3 | |
| ALARM4 | |
| ALARM5 | |
| RAMADDR | |
| RAMDATA |
00013 { 00014 CAPTURE0, CAPTURE1, CAPTURE2, CAPTURE3, CAPTURE4, CAPTURE5, 00015 RTC0CN, RTC0XCN, ALARM0, ALARM1, ALARM2, ALARM3, ALARM4, ALARM5, 00016 RAMADDR, RAMDATA };
| void rtc_ReadTimeReg | ( | uchar | addr | ) |
00114 { 00115 uchar idx; 00116 00117 RTC_WAIT(); // set the first address with auto-read 00118 RTC0ADR = addr | RTC_BUSY | RTC_AUTORD | RTC_SHORT; 00119 for ( idx = 0; idx < RTC_TimeSize; idx++ ) { 00120 RTC_WAIT(); 00121 rtc_myTime[ idx ] = RTC0DAT; 00122 } 00123 }
| void rtc_WriteTimeReg | ( | uchar | addr | ) |
00100 { 00101 uchar idx; 00102 00103 RTC_WAIT_WRITE( addr, rtc_myTime[ 0 ] ); 00104 for ( idx = 1; idx < RTC_TimeSize; idx++ ) { 00105 RTC_WAIT(); 00106 RTC0DAT = rtc_myTime[ idx ]; 00107 } 00108 }
| void SmaRTCInit | ( | void | ) |
00047 { 00048 RTC0KEY = 0xA5; // Unlock the smaRTClock interface 00049 RTC0KEY = 0xF1; 00050 // start RTC crystal OSC 00051 RTC_WRITE( RTC0XCN, 0x40 ); // auto-gain, Xtal 00052 RTC_WAIT_WRITE( RTC0CN, 0x80 ); // enable the smaRTClock 00053 RTC_WAIT(); 00054 do { // wait for stabilized 00055 RTC_READ( RTC0XCN ); 00056 RTC_WAIT(); 00057 } while ( !(RTC0DAT & 0x10) ); // check CLKVLD 00058 }
| unsigned long int SmaRTCRead | ( | void | ) |
00079 { 00080 unsigned long int ltime; 00081 int i; 00082 // read RTC time 00083 RTC_WAIT_WRITE( RTC0CN, 0x91 ) // enable, capture 00084 RTC_WAIT(); // wait for set time complete 00085 do { 00086 RTC_READ( RTC0CN ); 00087 RTC_WAIT(); 00088 } while ( RTC0DAT & 0x01 ); // check RTC0CAP 00089 rtc_ReadTimeReg( CAPTURE0 ); // read out CAPTURE register 00090 ltime = 0; 00091 for (i=2;i<6;i++) { 00092 ltime |= ((unsigned long int) rtc_myTime[i]) << (8*(i-2)); 00093 } 00094 return ltime; 00095 }
| void SmaRTCSetTime | ( | unsigned long int | mytime | ) |
00061 { 00062 int i; 00063 00064 for (i=2;i<6;i++) { 00065 rtc_myTime[i] = (uchar) (mytime >> (8*(i-2)) & 0xFF); 00066 } 00067 // set RTC time 00068 rtc_WriteTimeReg( CAPTURE0 ); // set CAPTRUE register 00069 RTC_WAIT_WRITE( RTC0CN, 0x82 ) // enable, set time 00070 RTC_WAIT(); // wait for set time complete 00071 do { 00072 RTC_READ( RTC0CN ); 00073 RTC_WAIT(); 00074 } while ( RTC0DAT & 0x02 ); // check RTC0SET 00075 RTC_WRITE( RTC0CN, 0x90 ); // run RTC 00076 }
1.4.7